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Change lib nRF24L01 to Davide Geroni

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This commit is contained in:
Aleksandr Filippov 2013-12-11 13:34:53 +07:00
parent 74f17bf353
commit 3833102873
26 changed files with 1485 additions and 1423 deletions
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2
Rmodule/Rmodule.aps
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@ -1 +1 @@
<AVRStudio><MANAGEMENT><ProjectName>Rmodule</ProjectName><Created>14-Nov-2013 11:48:57</Created><LastEdit>09-Dec-2013 21:08:58</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>14-Nov-2013 11:48:57</Created><Version>4</Version><Build>4, 19, 0, 730</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile>default\Rmodule.elf</ObjectFile><EntryFile></EntryFile><SaveFolder>c:\Hard\Git\Rmodule\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>AVR Simulator</CURRENT_TARGET><CURRENT_PART>ATmega8.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>main.c</SOURCEFILE><SOURCEFILE>C:\Hard\Git\Rmodule\nrf24l01\radioPinFunctions.c</SOURCEFILE><SOURCEFILE>C:\Hard\Git\Rmodule\nrf24l01\nrf24.c</SOURCEFILE><HEADERFILE>C:\Hard\Git\Rmodule\nrf24l01\nRF24L01.h</HEADERFILE><HEADERFILE>C:\Hard\Git\Rmodule\nrf24l01\nrf24.h</HEADERFILE><OTHERFILE>default\Rmodule.lss</OTHERFILE><OTHERFILE>default\Rmodule.map</OTHERFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>NO</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE></EXTERNALMAKEFILE><PART>atmega8</PART><HEX>1</HEX><LIST>1</LIST><MAP>1</MAP><OUTPUTFILENAME>Rmodule.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>1</ISDIRTY><OPTIONS><OPTION><FILE>main.c</FILE><OPTIONLIST></OPTIONLIST></OPTION></OPTIONS><INCDIRS/><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>C:\Program Files\Atmel\AVR Tools\AVR Toolchain\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>C:\Program Files\Atmel\AVR Tools\AVR Toolchain\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><ProjectFiles><Files><Name>C:\Hard\Git\Rmodule\nrf24l01\nRF24L01.h</Name><Name>C:\Hard\Git\Rmodule\nrf24l01\nrf24.h</Name><Name>c:\Hard\Git\Rmodule\main.c</Name><Name>C:\Hard\Git\Rmodule\nrf24l01\radioPinFunctions.c</Name><Name>C:\Hard\Git\Rmodule\nrf24l01\nrf24.c</Name></Files></ProjectFiles><IOView><usergroups/><sort sorted="0" column="0" ordername="1" orderaddress="1" ordergroup="1"/></IOView><Files><File00000><FileId>00000</FileId><FileName>main.c</FileName><Status>1</Status></File00000></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio> <AVRStudio><MANAGEMENT><ProjectName>Rmodule</ProjectName><Created>14-Nov-2013 11:48:57</Created><LastEdit>11-Dec-2013 13:32:48</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>14-Nov-2013 11:48:57</Created><Version>4</Version><Build>4, 19, 0, 730</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile>default\Rmodule.elf</ObjectFile><EntryFile></EntryFile><SaveFolder>c:\Hard\Git\Rmodule\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>AVR Simulator</CURRENT_TARGET><CURRENT_PART>ATmega8.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>main.c</SOURCEFILE><SOURCEFILE>C:\Hard\Git\Rmodule\onewire\onewire.c</SOURCEFILE><SOURCEFILE>C:\Hard\Git\Rmodule\onewire\crc8.c</SOURCEFILE><SOURCEFILE>C:\Hard\Git\Rmodule\nrf24l01\nrf24l01.c</SOURCEFILE><SOURCEFILE>C:\Hard\Git\Rmodule\spi\spi.c</SOURCEFILE><HEADERFILE>C:\Hard\Git\Rmodule\onewire\crc8.h</HEADERFILE><HEADERFILE>C:\Hard\Git\Rmodule\onewire\onewire.h</HEADERFILE><HEADERFILE>C:\Hard\Git\Rmodule\nrf24l01\nrf24l01registers.h</HEADERFILE><HEADERFILE>C:\Hard\Git\Rmodule\nrf24l01\nrf24l01.h</HEADERFILE><HEADERFILE>C:\Hard\Git\Rmodule\spi\spi.h</HEADERFILE><OTHERFILE>default\Rmodule.lss</OTHERFILE><OTHERFILE>default\Rmodule.map</OTHERFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>NO</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE></EXTERNALMAKEFILE><PART>atmega8</PART><HEX>1</HEX><LIST>1</LIST><MAP>1</MAP><OUTPUTFILENAME>Rmodule.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>1</ISDIRTY><OPTIONS><OPTION><FILE>main.c</FILE><OPTIONLIST></OPTIONLIST></OPTION></OPTIONS><INCDIRS/><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>C:\Program Files\Atmel\AVR Tools\AVR Toolchain\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>C:\Program Files\Atmel\AVR Tools\AVR Toolchain\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><IOView><usergroups/><sort sorted="0" column="0" ordername="1" orderaddress="1" ordergroup="1"/></IOView><Files><File00000><FileId>00000</FileId><FileName>main.c</FileName><Status>1</Status></File00000><File00001><FileId>00001</FileId><FileName>nrf24l01\nrf24l01.c</FileName><Status>1</Status></File00001><File00002><FileId>00002</FileId><FileName>nrf24l01\nrf24l01.h</FileName><Status>1</Status></File00002></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio>

12
Rmodule/default/Makefile
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@ -37,7 +37,7 @@ HEX_EEPROM_FLAGS += --change-section-lma .eeprom=0 --no-change-warnings
## Objects that must be built in order to link ## Objects that must be built in order to link
OBJECTS = main.o radioPinFunctions.o nrf24.o OBJECTS = main.o onewire.o crc8.o nrf24l01.o spi.o
## Objects explicitly added by the user ## Objects explicitly added by the user
LINKONLYOBJECTS = LINKONLYOBJECTS =
@ -49,10 +49,16 @@ all: $(TARGET) Rmodule.hex Rmodule.eep Rmodule.lss size
main.o: ../main.c main.o: ../main.c
$(CC) $(INCLUDES) $(CFLAGS) -c $< $(CC) $(INCLUDES) $(CFLAGS) -c $<
radioPinFunctions.o: ../nrf24l01/radioPinFunctions.c onewire.o: ../onewire/onewire.c
$(CC) $(INCLUDES) $(CFLAGS) -c $< $(CC) $(INCLUDES) $(CFLAGS) -c $<
nrf24.o: ../nrf24l01/nrf24.c crc8.o: ../onewire/crc8.c
$(CC) $(INCLUDES) $(CFLAGS) -c $<
nrf24l01.o: ../nrf24l01/nrf24l01.c
$(CC) $(INCLUDES) $(CFLAGS) -c $<
spi.o: ../spi/spi.c
$(CC) $(INCLUDES) $(CFLAGS) -c $< $(CC) $(INCLUDES) $(CFLAGS) -c $<
##Link ##Link

97
Rmodule/main.c
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@ -2,47 +2,76 @@
#include <avr/io.h> #include <avr/io.h>
#include <stdio.h> #include <stdio.h>
#include <string.h>
#include <avr/interrupt.h> #include <avr/interrupt.h>
#include <util/delay.h> #include <util/delay.h>
#include "nrf24l01/nrf24.h" #include <avr/eeprom.h>
#include "nrf24l01/nrf24l01.h"
#include "onewire/onewire.h"
typedef struct data_arr{ typedef struct t_data{
uint8_t buffer[32]; uint8_t from;
}data_array; uint8_t to;
char cmd[5];
uint8_t value[25];
}t_data;
uint8_t* address_at_eeprom_location = (uint8_t*)0;
uint8_t tx_mac[5] = {0xE7,0xE7,0xE7,0xE7,0xE7}; uint8_t getid(void){
uint8_t rx_mac[5] = {0xD7,0xD7,0xD7,0xD7,0xD7}; uint8_t result = 0;
if ( eeprom_read_byte(address_at_eeprom_location) == 0xdf ){
result = eeprom_read_byte(address_at_eeprom_location+1);
}else{
result =0x00;
}
return result;
}
int main(void){ void getListDevices(t_data data){
uint8_t i;
uint8_t id[OW_ROMCODE_SIZE];
uint8_t diff;
/* initializes hardware pins */ ow_reset();
nrf24_init(); diff = OW_SEARCH_FIRST;
while ( diff != OW_LAST_DEVICE) {
/* RF channel: #2 , payload length: 4 */ diff = ow_rom_search( diff, &id[0] );
nrf24_config(2,32); if ( diff != OW_PRESENCE_ERR && diff != OW_DATA_ERR) {
for ( i=0; i < OW_ROMCODE_SIZE; i++ ){
/* Set the module's own address */ data.value[i] = id[i];
nrf24_rx_address(rx_mac); }
data.value[OW_ROMCODE_SIZE] = 0x00;
/* Set the transmit address */ }
nrf24_tx_address(tx_mac); if (nrf24l01_write((uint8_t*) &data)){
}
sei(); }
}
data_array buff;
uint8_t mac[NRF24L01_ADDRSIZE] = {0xF0, 0xF0, 0xF0, 0xF0, 0xF0};
while(1){
if(nrf24_dataReady()){ int main(void){
nrf24_getData((uint8_t *) &buff);
nrf24_send((uint8_t*) &buff); uint8_t id = getid();
/* Wait for transmission to end */ nrf24l01_init();
while(nrf24_isSending()); sei();
/* Optionally, go back to RX mode ... */
nrf24_powerUpRx(); nrf24l01_setrxaddr(0, mac);
mac[4] = 0xF0 & ( 0x0F & id);
/* Wait a little ... */ nrf24l01_settxaddr(mac);
_delay_ms(10);
t_data data;
while(1){
if(nrf24l01_readready(&id)){
nrf24l01_read((uint8_t*) &data);
if (data.to==id && data.from==0x00){ // åñëè ýòî íàì è îò ñåðâåðà
if (strcmp(data.cmd, "ld")==0){ // êîìàíäà îïðîñà øèíû
data.from = id;
data.to = 0x00;
getListDevices(data);
}
}
} }
} }
} }

195
Rmodule/nrf24l01/nRF24L01.h
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@ -1,130 +1,101 @@
/* /*
Copyright (c) 2007 Stefan Engelke <mbox@stefanengelke.de> nrf24l01 lib 0x02
Permission is hereby granted, free of charge, to any person copyright (c) Davide Gironi, 2012
obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without
restriction, including without limitation the rights to use, copy,
modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be References:
included in all copies or substantial portions of the Software. - This library is based upon nRF24L01 avr lib by Stefan Engelke
http://www.tinkerer.eu/AVRLib/nRF24L01
- and arduino library 2011 by J. Coliz
http://maniacbug.github.com/RF24
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, Released under GPLv3.
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF Please refer to LICENSE file for licensing information.
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
$Id$
*/ */
/* Memory Map */ #ifndef _NRF24L01_H_
#define CONFIG 0x00 #define _NRF24L01_H_
#define EN_AA 0x01
#define EN_RXADDR 0x02
#define SETUP_AW 0x03
#define SETUP_RETR 0x04
#define RF_CH 0x05
#define RF_SETUP 0x06
#define STATUS 0x07
#define OBSERVE_TX 0x08
#define CD 0x09
#define RX_ADDR_P0 0x0A
#define RX_ADDR_P1 0x0B
#define RX_ADDR_P2 0x0C
#define RX_ADDR_P3 0x0D
#define RX_ADDR_P4 0x0E
#define RX_ADDR_P5 0x0F
#define TX_ADDR 0x10
#define RX_PW_P0 0x11
#define RX_PW_P1 0x12
#define RX_PW_P2 0x13
#define RX_PW_P3 0x14
#define RX_PW_P4 0x15
#define RX_PW_P5 0x16
#define FIFO_STATUS 0x17
#define DYNPD 0x1C
/* Bit Mnemonics */ #include <avr/io.h>
/* configuratio nregister */ //CE and CSN port definitions
#define MASK_RX_DR 6 #define NRF24L01_DDR DDRB
#define MASK_TX_DS 5 #define NRF24L01_PORT PORTB
#define MASK_MAX_RT 4 #define NRF24L01_CE PB0
#define EN_CRC 3 #define NRF24L01_CSN PB1
#define CRCO 2
#define PWR_UP 1
#define PRIM_RX 0
/* enable auto acknowledgment */ //define the spi path
#define ENAA_P5 5 #define NRF24L01_SPIPATH "../spi/spi.h" //spi lib path
#define ENAA_P4 4
#define ENAA_P3 3
#define ENAA_P2 2
#define ENAA_P1 1
#define ENAA_P0 0
/* enable rx addresses */ //CE and CSN functions
#define ERX_P5 5 #define nrf24l01_CSNhi NRF24L01_PORT |= (1<<NRF24L01_CSN);
#define ERX_P4 4 #define nrf24l01_CSNlo NRF24L01_PORT &= ~(1<<NRF24L01_CSN);
#define ERX_P3 3 #define nrf24l01_CEhi NRF24L01_PORT |= (1<<NRF24L01_CE);
#define ERX_P2 2 #define nrf24l01_CElo NRF24L01_PORT &= ~(1<<NRF24L01_CE);
#define ERX_P1 1
#define ERX_P0 0
/* setup of address width */ //power setup
#define AW 0 /* 2 bits */ #define NRF24L01_RF24_PA_MIN 1
#define NRF24L01_RF24_PA_LOW 2
#define NRF24L01_RF24_PA_HIGH 3
#define NRF24L01_RF24_PA_MAX 4
#define NRF24L01_RF24_PA NRF24L01_RF24_PA_MAX
/* setup of auto re-transmission */ //speed setup
#define ARD 4 /* 4 bits */ #define NRF24L01_RF24_SPEED_250KBPS 1
#define ARC 0 /* 4 bits */ #define NRF24L01_RF24_SPEED_1MBPS 2
#define NRF24L01_RF24_SPEED_2MBPS 3
#define NRF24L01_RF24_SPEED NRF24L01_RF24_SPEED_1MBPS
/* RF setup register */ //crc setup
#define PLL_LOCK 4 #define NRF24L01_RF24_CRC_DISABLED 1
#define RF_DR 3 #define NRF24L01_RF24_CRC_8 2
#define RF_PWR 1 /* 2 bits */ #define NRF24L01_RF24_CRC_16 3
#define NRF24L01_RF24_CRC NRF24L01_RF24_CRC_16
/* general status register */ //transmission channel
#define RX_DR 6 #define NRF24L01_CH 2
#define TX_DS 5
#define MAX_RT 4
#define RX_P_NO 1 /* 3 bits */
#define TX_FULL 0
/* transmit observe register */ //payload lenght
#define PLOS_CNT 4 /* 4 bits */ #define NRF24L01_PAYLOAD 32
#define ARC_CNT 0 /* 4 bits */
/* fifo status */ //auto ack enabled
#define TX_REUSE 6 #define NRF24L01_ACK 1
#define FIFO_FULL 5
#define TX_EMPTY 4
#define RX_FULL 1
#define RX_EMPTY 0
/* dynamic length */ //auto retransmit delay and count
#define DPL_P0 0 #define NRF24L01_RETR (0b0100 << NRF24L01_REG_ARD) | (0b0111 << NRF24L01_REG_ARC) //1500uS, 15 times
#define DPL_P1 1
#define DPL_P2 2
#define DPL_P3 3
#define DPL_P4 4
#define DPL_P5 5
/* Instruction Mnemonics */ //enable / disable pipe
#define R_REGISTER 0x00 /* last 4 bits will indicate reg. address */ #define NRF24L01_ENABLEDP0 1 //pipe 0
#define W_REGISTER 0x20 /* last 4 bits will indicate reg. address */ #define NRF24L01_ENABLEDP1 1 //pipe 1
#define REGISTER_MASK 0x1F #define NRF24L01_ENABLEDP2 1 //pipe 2
#define R_RX_PAYLOAD 0x61 #define NRF24L01_ENABLEDP3 1 //pipe 3
#define W_TX_PAYLOAD 0xA0 #define NRF24L01_ENABLEDP4 1 //pipe 4
#define FLUSH_TX 0xE1 #define NRF24L01_ENABLEDP5 1 //pipe 5
#define FLUSH_RX 0xE2
#define REUSE_TX_PL 0xE3 //address size
#define ACTIVATE 0x50 #define NRF24L01_ADDRSIZE 5
#define R_RX_PL_WID 0x60
#define NOP 0xFF //pipe address
#define NRF24L01_ADDRP0 {0xE8, 0xE8, 0xF0, 0xF0, 0xE2} //pipe 0, 5 byte address
#define NRF24L01_ADDRP1 {0xC1, 0xC2, 0xC2, 0xC2, 0xC2} //pipe 1, 5 byte address
#define NRF24L01_ADDRP2 {0xC1, 0xC2, 0xC2, 0xC2, 0xC3} //pipe 2, 5 byte address
#define NRF24L01_ADDRP3 {0xC1, 0xC2, 0xC2, 0xC2, 0xC4} //pipe 3, 5 byte address
#define NRF24L01_ADDRP4 {0xC1, 0xC2, 0xC2, 0xC2, 0xC5} //pipe 4, 5 byte address
#define NRF24L01_ADDRP5 {0xC1, 0xC2, 0xC2, 0xC2, 0xC6} //pipe 5, 5 byte address
#define NRF24L01_ADDRTX {0xE8, 0xE8, 0xF0, 0xF0, 0xE2} //tx default address*/
//enable print info function
#define NRF24L01_PRINTENABLE 0
extern void nrf24l01_init();
extern uint8_t nrf24l01_getstatus();
extern uint8_t nrf24l01_readready();
extern void nrf24l01_read(uint8_t *data);
extern uint8_t nrf24l01_write(uint8_t *data);
extern void nrf24l01_setrxaddr(uint8_t channel, uint8_t *addr);
extern void nrf24l01_settxaddr(uint8_t *addr);
#if NRF24L01_PRINTENABLE == 1
extern void nrf24l01_printinfo(void(*prints)(const char *), void(*printc)(unsigned char data));
#endif
#endif

351
Rmodule/nrf24l01/nrf24.c
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@ -1,351 +0,0 @@
/*
* ----------------------------------------------------------------------------
* “THE COFFEEWARE LICENSE” (Revision 1):
* <ihsan@kehribar.me> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a coffee in return.
* -----------------------------------------------------------------------------
* This library is based on this library:
* https://github.com/aaronds/arduino-nrf24l01
* Which is based on this library:
* http://www.tinkerer.eu/AVRLib/nRF24L01
* -----------------------------------------------------------------------------
*/
#include "nrf24.h"
uint8_t payload_len;
/* init the hardware pins */
void nrf24_init()
{
nrf24_setupPins();
nrf24_ce_digitalWrite(LOW);
nrf24_csn_digitalWrite(HIGH);
}
/* configure the module */
void nrf24_config(uint8_t channel, uint8_t pay_length)
{
/* Use static payload length ... */
payload_len = pay_length;
// Set RF channel
nrf24_configRegister(RF_CH,channel);
// Set length of incoming payload
nrf24_configRegister(RX_PW_P0, 0x00); // Auto-ACK pipe ...
nrf24_configRegister(RX_PW_P1, payload_len); // Data payload pipe
nrf24_configRegister(RX_PW_P2, 0x00); // Pipe not used
nrf24_configRegister(RX_PW_P3, 0x00); // Pipe not used
nrf24_configRegister(RX_PW_P4, 0x00); // Pipe not used
nrf24_configRegister(RX_PW_P5, 0x00); // Pipe not used
// 1 Mbps, TX gain: 0dbm
nrf24_configRegister(RF_SETUP, (0<<RF_DR)|((0x03)<<RF_PWR));
// CRC enable, 1 byte CRC length
nrf24_configRegister(CONFIG,nrf24_CONFIG);
// Auto Acknowledgment
nrf24_configRegister(EN_AA,(1<<ENAA_P0)|(1<<ENAA_P1)|(0<<ENAA_P2)|(0<<ENAA_P3)|(0<<ENAA_P4)|(0<<ENAA_P5));
// Enable RX addresses
nrf24_configRegister(EN_RXADDR,(1<<ERX_P0)|(1<<ERX_P1)|(0<<ERX_P2)|(0<<ERX_P3)|(0<<ERX_P4)|(0<<ERX_P5));
// Auto retransmit delay: 1000 us and Up to 15 retransmit trials
nrf24_configRegister(SETUP_RETR,(0x04<<ARD)|(0x0F<<ARC));
// Dynamic length configurations: No dynamic length
nrf24_configRegister(DYNPD,(0<<DPL_P0)|(0<<DPL_P1)|(0<<DPL_P2)|(0<<DPL_P3)|(0<<DPL_P4)|(0<<DPL_P5));
// Start listening
nrf24_powerUpRx();
}
/* Set the RX address */
void nrf24_rx_address(uint8_t * adr)
{
nrf24_ce_digitalWrite(LOW);
nrf24_writeRegister(RX_ADDR_P1,adr,nrf24_ADDR_LEN);
nrf24_ce_digitalWrite(HIGH);
}
/* Returns the payload length */
uint8_t nrf24_payload_length()
{
return payload_len;
}
/* Set the TX address */
void nrf24_tx_address(uint8_t* adr)
{
/* RX_ADDR_P0 must be set to the sending addr for auto ack to work. */
nrf24_writeRegister(RX_ADDR_P0,adr,nrf24_ADDR_LEN);
nrf24_writeRegister(TX_ADDR,adr,nrf24_ADDR_LEN);
}
/* Checks if data is available for reading */
/* Returns 1 if data is ready ... */
uint8_t nrf24_dataReady()
{
// See note in getData() function - just checking RX_DR isn't good enough
uint8_t status = nrf24_getStatus();
// We can short circuit on RX_DR, but if it's not set, we still need
// to check the FIFO for any pending packets
if ( status & (1 << RX_DR) )
{
return 1;
}
return !nrf24_rxFifoEmpty();;
}
/* Checks if receive FIFO is empty or not */
uint8_t nrf24_rxFifoEmpty()
{
uint8_t fifoStatus;
nrf24_readRegister(FIFO_STATUS,&fifoStatus,1);
return (fifoStatus & (1 << RX_EMPTY));
}
/* Returns the length of data waiting in the RX fifo */
uint8_t nrf24_payloadLength()
{
uint8_t status;
nrf24_csn_digitalWrite(LOW);
spi_transfer(R_RX_PL_WID);
status = spi_transfer(0x00);
nrf24_csn_digitalWrite(HIGH);
return status;
}
/* Reads payload bytes into data array */
void nrf24_getData(uint8_t* data)
{
/* Pull down chip select */
nrf24_csn_digitalWrite(LOW);
/* Send cmd to read rx payload */
spi_transfer( R_RX_PAYLOAD );
/* Read payload */
nrf24_transferSync(data,data,payload_len);
/* Pull up chip select */
nrf24_csn_digitalWrite(HIGH);
/* Reset status register */
nrf24_configRegister(STATUS,(1<<RX_DR));
}
/* Returns the number of retransmissions occured for the last message */
uint8_t nrf24_retransmissionCount()
{
uint8_t rv;
nrf24_readRegister(OBSERVE_TX,&rv,1);
rv = rv & 0x0F;
return rv;
}
// Sends a data package to the default address. Be sure to send the correct
// amount of bytes as configured as payload on the receiver.
void nrf24_send(uint8_t* value)
{
/* Go to Standby-I first */
nrf24_ce_digitalWrite(LOW);
/* Set to transmitter mode , Power up if needed */
nrf24_powerUpTx();
/* Do we really need to flush TX fifo each time ? */
#if 1
/* Pull down chip select */
nrf24_csn_digitalWrite(LOW);
/* Write cmd to flush transmit FIFO */
spi_transfer(FLUSH_TX);
/* Pull up chip select */
nrf24_csn_digitalWrite(HIGH);
#endif
/* Pull down chip select */
nrf24_csn_digitalWrite(LOW);
/* Write cmd to write payload */
spi_transfer(W_TX_PAYLOAD);
/* Write payload */
nrf24_transmitSync(value,payload_len);
/* Pull up chip select */
nrf24_csn_digitalWrite(HIGH);
/* Start the transmission */
nrf24_ce_digitalWrite(HIGH);
}
uint8_t nrf24_isSending()
{
uint8_t status;
/* read the current status */
status = nrf24_getStatus();
/* if sending successful (TX_DS) or max retries exceded (MAX_RT). */
if((status & ((1 << TX_DS) | (1 << MAX_RT))))
{
return 0; /* false */
}
return 1; /* true */
}
uint8_t nrf24_getStatus()
{
uint8_t rv;
nrf24_csn_digitalWrite(LOW);
rv = spi_transfer(NOP);
nrf24_csn_digitalWrite(HIGH);
return rv;
}
uint8_t nrf24_lastMessageStatus()
{
uint8_t rv;
rv = nrf24_getStatus();
/* Transmission went OK */
if((rv & ((1 << TX_DS))))
{
return NRF24_TRANSMISSON_OK;
}
/* Maximum retransmission count is reached */
/* Last message probably went missing ... */
else if((rv & ((1 << MAX_RT))))
{
return NRF24_MESSAGE_LOST;
}
/* Probably still sending ... */
else
{
return 0xFF;
}
}
void nrf24_powerUpRx()
{
nrf24_csn_digitalWrite(LOW);
spi_transfer(FLUSH_RX);
nrf24_csn_digitalWrite(HIGH);
nrf24_configRegister(STATUS,(1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT));
nrf24_ce_digitalWrite(LOW);
nrf24_configRegister(CONFIG,nrf24_CONFIG|((1<<PWR_UP)|(1<<PRIM_RX)));
nrf24_ce_digitalWrite(HIGH);
}
void nrf24_powerUpTx()
{
nrf24_configRegister(STATUS,(1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT));
nrf24_configRegister(CONFIG,nrf24_CONFIG|((1<<PWR_UP)|(0<<PRIM_RX)));
}
void nrf24_powerDown()
{
nrf24_ce_digitalWrite(LOW);
nrf24_configRegister(CONFIG,nrf24_CONFIG);
}
/* software spi routine */
uint8_t spi_transfer(uint8_t tx)
{
uint8_t i = 0;
uint8_t rx = 0;
nrf24_sck_digitalWrite(LOW);
for(i=0;i<8;i++)
{
if(tx & (1<<(7-i)))
{
nrf24_mosi_digitalWrite(HIGH);
}
else
{
nrf24_mosi_digitalWrite(LOW);
}
nrf24_sck_digitalWrite(HIGH);
rx = rx << 1;
if(nrf24_miso_digitalRead())
{
rx |= 0x01;
}
nrf24_sck_digitalWrite(LOW);
}
return rx;
}
/* send and receive multiple bytes over SPI */
void nrf24_transferSync(uint8_t* dataout,uint8_t* datain,uint8_t len)
{
uint8_t i;
for(i=0;i<len;i++)
{
datain[i] = spi_transfer(dataout[i]);
}
}
/* send multiple bytes over SPI */
void nrf24_transmitSync(uint8_t* dataout,uint8_t len)
{
uint8_t i;
for(i=0;i<len;i++)
{
spi_transfer(dataout[i]);
}
}
/* Clocks only one byte into the given nrf24 register */
void nrf24_configRegister(uint8_t reg, uint8_t value)
{
nrf24_csn_digitalWrite(LOW);
spi_transfer(W_REGISTER | (REGISTER_MASK & reg));
spi_transfer(value);
nrf24_csn_digitalWrite(HIGH);
}
/* Read single register from nrf24 */
void nrf24_readRegister(uint8_t reg, uint8_t* value, uint8_t len)
{
nrf24_csn_digitalWrite(LOW);
spi_transfer(R_REGISTER | (REGISTER_MASK & reg));
nrf24_transferSync(value,value,len);
nrf24_csn_digitalWrite(HIGH);
}
/* Write to a single register of nrf24 */
void nrf24_writeRegister(uint8_t reg, uint8_t* value, uint8_t len)
{
nrf24_csn_digitalWrite(LOW);
spi_transfer(W_REGISTER | (REGISTER_MASK & reg));
nrf24_transmitSync(value,len);
nrf24_csn_digitalWrite(HIGH);
}

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Rmodule/nrf24l01/nrf24.h
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@ -1,116 +0,0 @@
/*
* ----------------------------------------------------------------------------
* “THE COFFEEWARE LICENSE” (Revision 1):
* <ihsan@kehribar.me> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a coffee in return.
* -----------------------------------------------------------------------------
* This library is based on this library:
* https://github.com/aaronds/arduino-nrf24l01
* Which is based on this library:
* http://www.tinkerer.eu/AVRLib/nRF24L01
* -----------------------------------------------------------------------------
*/
#ifndef NRF24
#define NRF24
#include "nRF24L01.h"
#include <stdint.h>
#define LOW 0
#define HIGH 1
#define nrf24_ADDR_LEN 5
#define nrf24_CONFIG ((1<<EN_CRC)|(0<<CRCO))
#define NRF24_TRANSMISSON_OK 0
#define NRF24_MESSAGE_LOST 1
/* adjustment functions */
void nrf24_init();
void nrf24_rx_address(uint8_t* adr);
void nrf24_tx_address(uint8_t* adr);
void nrf24_config(uint8_t channel, uint8_t pay_length);
/* state check functions */
uint8_t nrf24_dataReady();
uint8_t nrf24_isSending();
uint8_t nrf24_getStatus();
uint8_t nrf24_rxFifoEmpty();
/* core TX / RX functions */
void nrf24_send(uint8_t* value);
void nrf24_getData(uint8_t* data);
/* use in dynamic length mode */
uint8_t nrf24_payloadLength();
/* post transmission analysis */
uint8_t nrf24_lastMessageStatus();
uint8_t nrf24_retransmissionCount();
/* Returns the payload length */
uint8_t nrf24_payload_length();
/* power management */
void nrf24_powerUpRx();
void nrf24_powerUpTx();
void nrf24_powerDown();
/* low level interface ... */
uint8_t spi_transfer(uint8_t tx);
void nrf24_transmitSync(uint8_t* dataout,uint8_t len);
void nrf24_transferSync(uint8_t* dataout,uint8_t* datain,uint8_t len);
void nrf24_configRegister(uint8_t reg, uint8_t value);
void nrf24_readRegister(uint8_t reg, uint8_t* value, uint8_t len);
void nrf24_writeRegister(uint8_t reg, uint8_t* value, uint8_t len);
/* -------------------------------------------------------------------------- */
/* You should implement the platform spesific functions in your code */
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
/* In this function you should do the following things:
* - Set MISO pin input
* - Set MOSI pin output
* - Set SCK pin output
* - Set CSN pin output
* - Set CE pin output */
/* -------------------------------------------------------------------------- */
extern void nrf24_setupPins();
/* -------------------------------------------------------------------------- */
/* nrf24 CE pin control function
* - state:1 => Pin HIGH
* - state:0 => Pin LOW */
/* -------------------------------------------------------------------------- */
extern void nrf24_ce_digitalWrite(uint8_t state);
/* -------------------------------------------------------------------------- */
/* nrf24 CE pin control function
* - state:1 => Pin HIGH
* - state:0 => Pin LOW */
/* -------------------------------------------------------------------------- */
extern void nrf24_csn_digitalWrite(uint8_t state);
/* -------------------------------------------------------------------------- */
/* nrf24 SCK pin control function
* - state:1 => Pin HIGH
* - state:0 => Pin LOW */
/* -------------------------------------------------------------------------- */
extern void nrf24_sck_digitalWrite(uint8_t state);
/* -------------------------------------------------------------------------- */
/* nrf24 MOSI pin control function
* - state:1 => Pin HIGH
* - state:0 => Pin LOW */
/* -------------------------------------------------------------------------- */
extern void nrf24_mosi_digitalWrite(uint8_t state);
/* -----------------------------------------*/
/* nrf24 MISO pin read function */
/* - returns: Non-zero if the pin is high */
/* -----------------------------------------*/
extern uint8_t nrf24_miso_digitalRead();
#endif

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/*
nrf24l01 lib 0x02
copyright (c) Davide Gironi, 2012
Released under GPLv3.
Please refer to LICENSE file for licensing information.
*/
#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <string.h>
#include <stdio.h>
#include "nrf24l01.h"
#include "nrf24l01registers.h"
//include spi library functions
#include NRF24L01_SPIPATH
//address variables
static uint8_t nrf24l01_addr0[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP0;
static uint8_t nrf24l01_addr1[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP1;
static uint8_t nrf24l01_addr2[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP2;
static uint8_t nrf24l01_addr3[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP3;
static uint8_t nrf24l01_addr4[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP4;
static uint8_t nrf24l01_addr5[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP5;
static uint8_t nrf24l01_addrtx[NRF24L01_ADDRSIZE] = NRF24L01_ADDRTX;
/*
* read one register
*/
uint8_t nrf24l01_readregister(uint8_t reg) {
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_R_REGISTER | (NRF24L01_CMD_REGISTER_MASK & reg));
uint8_t result = spi_writereadbyte(NRF24L01_CMD_NOP); //read write register
nrf24l01_CSNhi; //high CSN
return result;
}
/*
* read many registers
*/
void nrf24l01_readregisters(uint8_t reg, uint8_t *value, uint8_t len) {
uint8_t i = 0;
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_R_REGISTER | (NRF24L01_CMD_REGISTER_MASK & reg));
for(i=0; i<len; i++)
value[i] = spi_writereadbyte(NRF24L01_CMD_NOP); //read write register
nrf24l01_CSNhi; //high CSN
}
/*
* write one register
*/
void nrf24l01_writeregister(uint8_t reg, uint8_t value) {
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_W_REGISTER | (NRF24L01_CMD_REGISTER_MASK & reg));
spi_writereadbyte(value); //write register
nrf24l01_CSNhi; //high CSN
}
/*
* write many registers
*/
void nrf24l01_writeregisters(uint8_t reg, uint8_t *value, uint8_t len) {
uint8_t i = 0;
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_W_REGISTER | (NRF24L01_CMD_REGISTER_MASK & reg));
for(i=0; i<len; i++)
spi_writereadbyte(value[i]); //write register
nrf24l01_CSNhi; //high CSN
}
/*
* reverse an array, NRF24L01 expects LSB first
*/
void nrf24l01_revaddress(uint8_t *addr, uint8_t *addrrev) {
//reverse address
uint8_t i = 0;
for(i=0; i<NRF24L01_ADDRSIZE; i++)
memcpy(&addrrev[i], &addr[NRF24L01_ADDRSIZE-1-i], 1);
}
/*
* set rx address
*/
void nrf24l01_setrxaddr(uint8_t pipe, uint8_t *addr) {
if(pipe == 0) {
memcpy(&nrf24l01_addr0, addr, NRF24L01_ADDRSIZE); //cache address
uint8_t addrrev[NRF24L01_ADDRSIZE];
nrf24l01_revaddress(addr, (uint8_t *)addrrev);
nrf24l01_writeregisters(NRF24L01_REG_RX_ADDR_P0, addrrev, NRF24L01_ADDRSIZE);
} else if(pipe == 1) {
memcpy(&nrf24l01_addr1, addr, NRF24L01_ADDRSIZE); //cache address
uint8_t addrrev[NRF24L01_ADDRSIZE];
nrf24l01_revaddress(addr, (uint8_t *)addrrev);
nrf24l01_writeregisters(NRF24L01_REG_RX_ADDR_P1, addrrev, NRF24L01_ADDRSIZE);
} else if(pipe == 2) {
memcpy(&nrf24l01_addr2, addr, NRF24L01_ADDRSIZE); //cache address
nrf24l01_writeregister(NRF24L01_REG_RX_ADDR_P2, addr[NRF24L01_ADDRSIZE-1]); //write only LSB MSBytes are equal to RX_ADDR_P
} else if(pipe == 3) {
memcpy(&nrf24l01_addr3, addr, NRF24L01_ADDRSIZE); //cache address
nrf24l01_writeregister(NRF24L01_REG_RX_ADDR_P3, addr[NRF24L01_ADDRSIZE-1]); //write only LSB MSBytes are equal to RX_ADDR_P
} else if(pipe == 4) {
memcpy(&nrf24l01_addr4, addr, NRF24L01_ADDRSIZE); //cache address
nrf24l01_writeregister(NRF24L01_REG_RX_ADDR_P4, addr[NRF24L01_ADDRSIZE-1]); //write only LSB MSBytes are equal to RX_ADDR_P
} else if(pipe == 5) {
memcpy(&nrf24l01_addr5, addr, NRF24L01_ADDRSIZE); //cache address
nrf24l01_writeregister(NRF24L01_REG_RX_ADDR_P5, addr[NRF24L01_ADDRSIZE-1]); //write only LSB MSBytes are equal to RX_ADDR_P
}
}
/*
* set tx address
*/
void nrf24l01_settxaddr(uint8_t *addr) {
memcpy(&nrf24l01_addrtx, addr, NRF24L01_ADDRSIZE); //cache address
uint8_t addrrev[NRF24L01_ADDRSIZE];
nrf24l01_revaddress(addr, (uint8_t *)addrrev);
nrf24l01_writeregisters(NRF24L01_REG_RX_ADDR_P0, addrrev, NRF24L01_ADDRSIZE); //set rx address for ack on pipe 0
nrf24l01_writeregisters(NRF24L01_REG_TX_ADDR, addrrev, NRF24L01_ADDRSIZE); //set tx address
}
/*
* flush RX fifo
*/
void nrf24l01_flushRXfifo() {
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_FLUSH_RX);
nrf24l01_CSNhi; //high CSN
}
/*
* flush RX fifo
*/
void nrf24l01_flushTXfifo() {
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_FLUSH_TX);
nrf24l01_CSNhi; //high CSN
}
/*
* set chip as RX
*/
void nrf24l01_setRX() {
nrf24l01_setrxaddr(0, nrf24l01_addr0); //restore pipe 0 address
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) | (1<<NRF24L01_REG_PRIM_RX)); //prx mode
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) | (1<<NRF24L01_REG_PWR_UP)); //power up
nrf24l01_writeregister(NRF24L01_REG_STATUS, (1<<NRF24L01_REG_RX_DR) | (1<<NRF24L01_REG_TX_DS) | (1<<NRF24L01_REG_MAX_RT)); //reset status
nrf24l01_flushRXfifo(); //flush rx fifo
nrf24l01_flushTXfifo(); //flush tx fifo
nrf24l01_CEhi; //start listening
_delay_us(150); //wait for the radio to power up
}
/*
* set chip as TX
*/
void nrf24l01_setTX() {
nrf24l01_CElo; //stop listening
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) & ~(1<<NRF24L01_REG_PRIM_RX)); //ptx mode
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) | (1<<NRF24L01_REG_PWR_UP)); //power up
nrf24l01_writeregister(NRF24L01_REG_STATUS, (1<<NRF24L01_REG_RX_DR) | (1<<NRF24L01_REG_TX_DS) | (1<<NRF24L01_REG_MAX_RT)); //reset status
nrf24l01_flushTXfifo(); //flush tx fifo
_delay_us(150); //wait for the radio to power up
}
#if NRF24L01_PRINTENABLE == 1
/*
* print info
*/
void nrf24l01_printinfo(void(*prints)(const char *), void(*printc)(unsigned char data)) {
char buff[100];
prints("info\r\n");
sprintf(buff,"STATUS: %02X\r\n", nrf24l01_getstatus()); prints(buff);
sprintf(buff,"CONFIG: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_CONFIG)); prints(buff);
sprintf(buff,"RF_CH: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_RF_CH)); prints(buff);
sprintf(buff,"RF_SETUP: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_RF_SETUP)); prints(buff);
sprintf(buff,"EN_AA: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_EN_AA)); prints(buff);
sprintf(buff,"EN_RXADDR: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_EN_RXADDR)); prints(buff);
sprintf(buff,"OBSERVE_TX: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_OBSERVE_TX)); prints(buff);
prints("\r\n");
}
#endif
/*
* get status register
*/
uint8_t nrf24l01_getstatus() {
uint8_t status = 0;
nrf24l01_CSNlo; //low CSN
status = spi_writereadbyte(NRF24L01_CMD_NOP); //get status, send NOP request
nrf24l01_CSNhi; //high CSN
return status;
}
/*
* check if there is data ready
*/
uint8_t nrf24l01_readready(uint8_t* pipe) {
uint8_t status = nrf24l01_getstatus();
uint8_t ret = status & (1<<NRF24L01_REG_RX_DR);
if(ret) {
//get the pipe number
if(pipe)
*pipe = (status >> NRF24L01_REG_RX_P_NO) & 0b111;
}
return ret;
}
/*
* get data
*/
void nrf24l01_read(uint8_t *data) {
uint8_t i = 0;
//read rx register
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_R_RX_PAYLOAD);
for(i=0; i<NRF24L01_PAYLOAD; i++)
data[i] = spi_writereadbyte(NRF24L01_CMD_NOP);
nrf24l01_CSNhi; //high CSN
//reset register
nrf24l01_writeregister(NRF24L01_REG_STATUS, (1<<NRF24L01_REG_RX_DR));
//handle ack payload receipt
if (nrf24l01_getstatus() & (1<<NRF24L01_REG_TX_DS))
nrf24l01_writeregister(NRF24L01_REG_STATUS, (1<<NRF24L01_REG_TX_DS));
}
/*
* put data
*/
uint8_t nrf24l01_write(uint8_t *data) {
uint8_t i = 0;
uint8_t ret = 0;
//set tx mode
nrf24l01_setTX();
//write data
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_W_TX_PAYLOAD);
for (i=0; i<NRF24L01_PAYLOAD; i++)
spi_writereadbyte(data[i]);
nrf24l01_CSNhi; //high CSN
//start transmission
nrf24l01_CEhi; //high CE
_delay_us(15);
nrf24l01_CElo; //low CE
//stop if max_retries reached or send is ok
do {
_delay_us(10);
}
while( !(nrf24l01_getstatus() & (1<<NRF24L01_REG_MAX_RT | 1<<NRF24L01_REG_TX_DS)) );
if(nrf24l01_getstatus() & 1<<NRF24L01_REG_TX_DS)
ret = 1;
//reset PLOS_CNT
nrf24l01_writeregister(NRF24L01_REG_RF_CH, NRF24L01_CH);
//power down
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) & ~(1<<NRF24L01_REG_PWR_UP));
//set rx mode
nrf24l01_setRX();
return ret;
}
/*
* set power level
*/
void nrf24l01_setpalevel() {
uint8_t setup = nrf24l01_readregister(NRF24L01_REG_RF_SETUP);
setup &= ~((1<<NRF24L01_REG_RF_PWR_LOW) | (1<<NRF24L01_REG_RF_PWR_HIGH));
if (NRF24L01_RF24_PA == NRF24L01_RF24_PA_MAX) {
setup |= (1<<NRF24L01_REG_RF_PWR_LOW) | (1<<NRF24L01_REG_RF_PWR_HIGH);
} else if (NRF24L01_RF24_PA == NRF24L01_RF24_PA_HIGH) {
setup |= (1<<NRF24L01_REG_RF_PWR_HIGH) ;
} else if (NRF24L01_RF24_PA == NRF24L01_RF24_PA_LOW) {
setup |= (1<<NRF24L01_REG_RF_PWR_LOW);
} else if (NRF24L01_RF24_PA == NRF24L01_RF24_PA_MIN) {
} else {
//default is max power
setup |= (1<<NRF24L01_REG_RF_PWR_LOW) | (1<<NRF24L01_REG_RF_PWR_HIGH);
}
nrf24l01_writeregister(NRF24L01_REG_RF_SETUP, setup);
}
/*
* set datarate
*/
void nrf24l01_setdatarate() {
uint8_t setup = nrf24l01_readregister(NRF24L01_REG_RF_SETUP) ;
setup &= ~((1<<NRF24L01_REG_RF_DR_LOW) | (1<<NRF24L01_REG_RF_DR_HIGH));
if(NRF24L01_RF24_SPEED == NRF24L01_RF24_SPEED_250KBPS) {
setup |= (1<<NRF24L01_REG_RF_DR_LOW);
} else {
if (NRF24L01_RF24_SPEED == NRF24L01_RF24_SPEED_2MBPS) {
setup |= (1<<NRF24L01_REG_RF_DR_HIGH);
} else if (NRF24L01_RF24_SPEED == NRF24L01_RF24_SPEED_2MBPS) {
} else {
//default is 1Mbps
}
}
nrf24l01_writeregister(NRF24L01_REG_RF_SETUP, setup);
}
/*
* set crc length
*/
void nrf24l01_setcrclength() {
uint8_t config = nrf24l01_readregister(NRF24L01_REG_CONFIG) & ~((1<<NRF24L01_REG_CRCO) | (1<<NRF24L01_REG_EN_CRC));
if (NRF24L01_RF24_CRC == NRF24L01_RF24_CRC_DISABLED) {
//nothing
} else if (NRF24L01_RF24_CRC == NRF24L01_RF24_CRC_8) {
config |= (1<<NRF24L01_REG_EN_CRC);
} else if (NRF24L01_RF24_CRC == NRF24L01_RF24_CRC_16) {
config |= (1<<NRF24L01_REG_EN_CRC);
config |= (1<<NRF24L01_REG_CRCO);
} else {
//default is disabled
}
nrf24l01_writeregister(NRF24L01_REG_CONFIG, config);
}
/*
* init nrf24l01
*/
void nrf24l01_init() {
//setup port
NRF24L01_DDR |= (1<<NRF24L01_CSN); //output
NRF24L01_DDR |= (1<<NRF24L01_CE); //output
spi_init(); //init spi
nrf24l01_CElo; //low CE
nrf24l01_CSNhi; //high CSN
_delay_ms(5); //wait for the radio to init
nrf24l01_setpalevel(); //set power level
nrf24l01_setdatarate(); //set data rate
nrf24l01_setcrclength(); //set crc length
nrf24l01_writeregister(NRF24L01_REG_SETUP_RETR, NRF24L01_RETR); // set retries
nrf24l01_writeregister(NRF24L01_REG_DYNPD, 0); //disable dynamic payloads
nrf24l01_writeregister(NRF24L01_REG_RF_CH, NRF24L01_CH); //set RF channel
//payload size
#if NRF24L01_ENABLEDP0 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P0, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP1 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P1, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP2 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P2, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP3 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P3, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP4 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P4, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP5 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P5, NRF24L01_PAYLOAD);
#endif
//enable pipe
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, 0);
#if NRF24L01_ENABLEDP0 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P0));
#endif
#if NRF24L01_ENABLEDP1 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P1));
#endif
#if NRF24L01_ENABLEDP2 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P2));
#endif
#if NRF24L01_ENABLEDP3 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P3));
#endif
#if NRF24L01_ENABLEDP4 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P4));
#endif
#if NRF24L01_ENABLEDP5 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P5));
#endif
//auto ack
#if NRF24L01_ACK == 1
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P0));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P1));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P2));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P3));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P4));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P5));
#else
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P0));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P1));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P2));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P3));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P4));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P5));
#endif
//rx address
nrf24l01_setrxaddr(0, nrf24l01_addr0);
nrf24l01_setrxaddr(1, nrf24l01_addr1);
nrf24l01_setrxaddr(2, nrf24l01_addr2);
nrf24l01_setrxaddr(3, nrf24l01_addr3);
nrf24l01_setrxaddr(4, nrf24l01_addr4);
nrf24l01_setrxaddr(5, nrf24l01_addr5);
//tx address
nrf24l01_settxaddr(nrf24l01_addrtx);
//set rx mode
nrf24l01_setRX();
}

92
Rmodule/nrf24l01/nrf24l01registers.h Normal file
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@ -0,0 +1,92 @@
/*
nrf24l01 lib 0x02
copyright (c) Davide Gironi, 2012
Released under GPLv3.
Please refer to LICENSE file for licensing information.
*/
/* Memory Map */
#define NRF24L01_REG_CONFIG 0x00
#define NRF24L01_REG_EN_AA 0x01
#define NRF24L01_REG_EN_RXADDR 0x02
#define NRF24L01_REG_SETUP_AW 0x03
#define NRF24L01_REG_SETUP_RETR 0x04
#define NRF24L01_REG_RF_CH 0x05
#define NRF24L01_REG_RF_SETUP 0x06
#define NRF24L01_REG_STATUS 0x07
#define NRF24L01_REG_OBSERVE_TX 0x08
#define NRF24L01_REG_CD 0x09
#define NRF24L01_REG_RX_ADDR_P0 0x0A
#define NRF24L01_REG_RX_ADDR_P1 0x0B
#define NRF24L01_REG_RX_ADDR_P2 0x0C
#define NRF24L01_REG_RX_ADDR_P3 0x0D
#define NRF24L01_REG_RX_ADDR_P4 0x0E
#define NRF24L01_REG_RX_ADDR_P5 0x0F
#define NRF24L01_REG_TX_ADDR 0x10
#define NRF24L01_REG_RX_PW_P0 0x11
#define NRF24L01_REG_RX_PW_P1 0x12
#define NRF24L01_REG_RX_PW_P2 0x13
#define NRF24L01_REG_RX_PW_P3 0x14
#define NRF24L01_REG_RX_PW_P4 0x15
#define NRF24L01_REG_RX_PW_P5 0x16
#define NRF24L01_REG_FIFO_STATUS 0x17
#define NRF24L01_REG_FEATURE 0x1D
#define NRF24L01_REG_DYNPD 0x1C
/* Bit Mnemonics */
#define NRF24L01_REG_MASK_RX_DR 6
#define NRF24L01_REG_MASK_TX_DS 5
#define NRF24L01_REG_MASK_MAX_RT 4
#define NRF24L01_REG_EN_CRC 3
#define NRF24L01_REG_CRCO 2
#define NRF24L01_REG_PWR_UP 1
#define NRF24L01_REG_PRIM_RX 0
#define NRF24L01_REG_ENAA_P5 5
#define NRF24L01_REG_ENAA_P4 4
#define NRF24L01_REG_ENAA_P3 3
#define NRF24L01_REG_ENAA_P2 2
#define NRF24L01_REG_ENAA_P1 1
#define NRF24L01_REG_ENAA_P0 0
#define NRF24L01_REG_ERX_P5 5
#define NRF24L01_REG_ERX_P4 4
#define NRF24L01_REG_ERX_P3 3
#define NRF24L01_REG_ERX_P2 2
#define NRF24L01_REG_ERX_P1 1
#define NRF24L01_REG_ERX_P0 0
#define NRF24L01_REG_AW 0
#define NRF24L01_REG_ARD 4
#define NRF24L01_REG_ARC 0
#define NRF24L01_REG_PLL_LOCK 4
#define NRF24L01_REG_RF_DR 3
#define NRF24L01_REG_RF_PWR 1
#define NRF24L01_REG_LNA_HCURR 0
#define NRF24L01_REG_RX_DR 6
#define NRF24L01_REG_TX_DS 5
#define NRF24L01_REG_MAX_RT 4
#define NRF24L01_REG_RX_P_NO 1
#define NRF24L01_REG_TX_FULL 0
#define NRF24L01_REG_PLOS_CNT 4
#define NRF24L01_REG_ARC_CNT 0
#define NRF24L01_REG_TX_REUSE 6
#define NRF24L01_REG_FIFO_FULL 5
#define NRF24L01_REG_TX_EMPTY 4
#define NRF24L01_REG_RX_FULL 1
#define NRF24L01_REG_RX_EMPTY 0
#define NRF24L01_REG_RPD 0x09
#define NRF24L01_REG_RF_DR_LOW 5
#define NRF24L01_REG_RF_DR_HIGH 3
#define NRF24L01_REG_RF_PWR_LOW 1
#define NRF24L01_REG_RF_PWR_HIGH 2
/* Instruction Mnemonics */
#define NRF24L01_CMD_R_REGISTER 0x00
#define NRF24L01_CMD_W_REGISTER 0x20
#define NRF24L01_CMD_REGISTER_MASK 0x1F
#define NRF24L01_CMD_R_RX_PAYLOAD 0x61
#define NRF24L01_CMD_W_TX_PAYLOAD 0xA0
#define NRF24L01_CMD_FLUSH_TX 0xE1
#define NRF24L01_CMD_FLUSH_RX 0xE2
#define NRF24L01_CMD_REUSE_TX_PL 0xE3
#define NRF24L01_CMD_NOP 0xFF

80
Rmodule/nrf24l01/radioPinFunctions.c
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@ -1,80 +0,0 @@
/*
* ----------------------------------------------------------------------------
* “THE COFFEEWARE LICENSE” (Revision 1):
* <ihsan@kehribar.me> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a coffee in return.
* -----------------------------------------------------------------------------
* Please define your platform spesific functions in this file ...
* -----------------------------------------------------------------------------
*/
#include <avr/io.h>
#define set_bit(reg,bit) reg |= (1<<bit)
#define clr_bit(reg,bit) reg &= ~(1<<bit)
#define check_bit(reg,bit) (reg&(1<<bit))
/* ------------------------------------------------------------------------- */
void nrf24_setupPins()
{
set_bit(DDRB,0); // CE output
set_bit(DDRB,1); // CSN output
set_bit(DDRB,5); // SCK output
set_bit(DDRB,3); // MOSI output
clr_bit(DDRB,4); // MISO input
}
/* ------------------------------------------------------------------------- */
void nrf24_ce_digitalWrite(uint8_t state)
{
if(state)
{
set_bit(PORTB,0);
}
else
{
clr_bit(PORTB,0);
}
}
/* ------------------------------------------------------------------------- */
void nrf24_csn_digitalWrite(uint8_t state)
{
if(state)
{
set_bit(PORTB,1);
}
else
{
clr_bit(PORTB,1);
}
}
/* ------------------------------------------------------------------------- */
void nrf24_sck_digitalWrite(uint8_t state)
{
if(state)
{
set_bit(PORTB,5);
}
else
{
clr_bit(PORTB,5);
}
}
/* ------------------------------------------------------------------------- */
void nrf24_mosi_digitalWrite(uint8_t state)
{
if(state)
{
set_bit(PORTB,3);
}
else
{
clr_bit(PORTB,3);
}
}
/* ------------------------------------------------------------------------- */
uint8_t nrf24_miso_digitalRead()
{
return check_bit(PINB,4);
}
/* ------------------------------------------------------------------------- */

2
Rmodule/rmodule.aws
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@ -1 +1 @@
<AVRWorkspace><IOSettings><CurrentRegisters/></IOSettings><part name="ATMEGA8"/><Files><File00000 Name="c:\Hard\Git\Rmodule\main.c" Position="262 96 1079 803" LineCol="26 1" State="Maximized"/></Files></AVRWorkspace> <AVRWorkspace><IOSettings><CurrentRegisters/></IOSettings><part name="ATMEGA8"/><Files><File00000 Name="c:\Hard\Git\Rmodule\main.c" Position="268 118 1398 608" LineCol="66 0"/></Files></AVRWorkspace>

43
Rmodule/spi/spi.c Normal file
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@ -0,0 +1,43 @@
/*
spi lib 0x01
copyright (c) Davide Gironi, 2012
Released under GPLv3.
Please refer to LICENSE file for licensing information.
*/
#include "spi.h"
#include <avr/io.h>
#include <avr/interrupt.h>
/*
* spi initialize
*/
void spi_init() {
SPI_DDR &= ~((1<<SPI_MOSI) | (1<<SPI_MISO) | (1<<SPI_SS) | (1<<SPI_SCK)); //input
SPI_DDR |= ((1<<SPI_MOSI) | (1<<SPI_SS) | (1<<SPI_SCK)); //output
SPCR = ((1<<SPE)| // SPI Enable
(0<<SPIE)| // SPI Interupt Enable
(0<<DORD)| // Data Order (0:MSB first / 1:LSB first)
(1<<MSTR)| // Master/Slave select
(0<<SPR1)|(1<<SPR0)| // SPI Clock Rate
(0<<CPOL)| // Clock Polarity (0:SCK low / 1:SCK hi when idle)
(0<<CPHA)); // Clock Phase (0:leading / 1:trailing edge sampling)
SPSR = (1<<SPI2X); // Double SPI Speed Bit
}
/*
* spi write one byte and read it back
*/
uint8_t spi_writereadbyte(uint8_t data) {
SPDR = data;
while((SPSR & (1<<SPIF)) == 0);
return SPDR;
}

31
Rmodule/spi/spi.h Normal file
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@ -0,0 +1,31 @@
/*
spi lib 0x01
copyright (c) Davide Gironi, 2012
References:
- This library is based upon SPI avr lib by Stefan Engelke
http://www.tinkerer.eu/AVRLib/SPI
Released under GPLv3.
Please refer to LICENSE file for licensing information.
*/
#ifndef _SPI_H_
#define _SPI_H_
#include <avr/io.h>
//spi ports
#define SPI_DDR DDRB
#define SPI_PORT PORTB
#define SPI_MISO PB4
#define SPI_MOSI PB3
#define SPI_SCK PB5
#define SPI_SS PB2
extern void spi_init();
extern uint8_t spi_writereadbyte(uint8_t data);
#endif

2
Smodule/Smodule.aps
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@ -1 +1 @@
<AVRStudio><MANAGEMENT><ProjectName>Smodule</ProjectName><Created>04-Dec-2013 09:22:09</Created><LastEdit>08-Dec-2013 13:26:42</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>04-Dec-2013 09:22:09</Created><Version>4</Version><Build>4, 19, 0, 730</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile>default\Smodule.elf</ObjectFile><EntryFile></EntryFile><SaveFolder>c:\Hard\Git\Smodule\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>AVR Simulator</CURRENT_TARGET><CURRENT_PART>ATmega8.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>main.c</SOURCEFILE><SOURCEFILE>uart\uart_addon.c</SOURCEFILE><SOURCEFILE>uart\uart.c</SOURCEFILE><SOURCEFILE>nrf24l01\nrf24.c</SOURCEFILE><SOURCEFILE>nrf24l01\radioPinFunctions.c</SOURCEFILE><HEADERFILE>res\strings.h</HEADERFILE><HEADERFILE>uart\uart.h</HEADERFILE><HEADERFILE>uart\uart_addon.h</HEADERFILE><HEADERFILE>nrf24l01\nrf24.h</HEADERFILE><HEADERFILE>nrf24l01\nRF24L01.h</HEADERFILE><OTHERFILE>default\Smodule.lss</OTHERFILE><OTHERFILE>default\Smodule.map</OTHERFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>NO</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE></EXTERNALMAKEFILE><PART>atmega8</PART><HEX>1</HEX><LIST>1</LIST><MAP>1</MAP><OUTPUTFILENAME>Smodule.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>1</ISDIRTY><OPTIONS/><INCDIRS/><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>C:\Program Files\Atmel\AVR Tools\AVR Toolchain\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>C:\Program Files\Atmel\AVR Tools\AVR Toolchain\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><ProjectFiles><Files><Name>c:\Hard\Git\Smodule\res\strings.h</Name><Name>c:\Hard\Git\Smodule\uart\uart.h</Name><Name>c:\Hard\Git\Smodule\uart\uart_addon.h</Name><Name>c:\Hard\Git\Smodule\nrf24l01\nrf24.h</Name><Name>c:\Hard\Git\Smodule\nrf24l01\nRF24L01.h</Name><Name>c:\Hard\Git\Smodule\main.c</Name><Name>c:\Hard\Git\Smodule\uart\uart_addon.c</Name><Name>c:\Hard\Git\Smodule\uart\uart.c</Name><Name>c:\Hard\Git\Smodule\nrf24l01\nrf24.c</Name><Name>c:\Hard\Git\Smodule\nrf24l01\radioPinFunctions.c</Name></Files></ProjectFiles><IOView><usergroups/><sort sorted="0" column="0" ordername="1" orderaddress="1" ordergroup="1"/></IOView><Files><File00000><FileId>00000</FileId><FileName>main.c</FileName><Status>1</Status></File00000><File00001><FileId>00001</FileId><FileName>res\strings.h</FileName><Status>1</Status></File00001></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio> <AVRStudio><MANAGEMENT><ProjectName>Smodule</ProjectName><Created>04-Dec-2013 09:22:09</Created><LastEdit>11-Dec-2013 13:32:45</LastEdit><ICON>241</ICON><ProjectType>0</ProjectType><Created>04-Dec-2013 09:22:09</Created><Version>4</Version><Build>4, 19, 0, 730</Build><ProjectTypeName>AVR GCC</ProjectTypeName></MANAGEMENT><CODE_CREATION><ObjectFile>default\Smodule.elf</ObjectFile><EntryFile></EntryFile><SaveFolder>c:\Hard\Git\Smodule\</SaveFolder></CODE_CREATION><DEBUG_TARGET><CURRENT_TARGET>AVR Simulator</CURRENT_TARGET><CURRENT_PART>ATmega8.xml</CURRENT_PART><BREAKPOINTS></BREAKPOINTS><IO_EXPAND><HIDE>false</HIDE></IO_EXPAND><REGISTERNAMES><Register>R00</Register><Register>R01</Register><Register>R02</Register><Register>R03</Register><Register>R04</Register><Register>R05</Register><Register>R06</Register><Register>R07</Register><Register>R08</Register><Register>R09</Register><Register>R10</Register><Register>R11</Register><Register>R12</Register><Register>R13</Register><Register>R14</Register><Register>R15</Register><Register>R16</Register><Register>R17</Register><Register>R18</Register><Register>R19</Register><Register>R20</Register><Register>R21</Register><Register>R22</Register><Register>R23</Register><Register>R24</Register><Register>R25</Register><Register>R26</Register><Register>R27</Register><Register>R28</Register><Register>R29</Register><Register>R30</Register><Register>R31</Register></REGISTERNAMES><COM>Auto</COM><COMType>0</COMType><WATCHNUM>0</WATCHNUM><WATCHNAMES><Pane0></Pane0><Pane1></Pane1><Pane2></Pane2><Pane3></Pane3></WATCHNAMES><BreakOnTrcaeFull>0</BreakOnTrcaeFull></DEBUG_TARGET><Debugger><Triggers></Triggers></Debugger><AVRGCCPLUGIN><FILES><SOURCEFILE>main.c</SOURCEFILE><SOURCEFILE>uart\uart_addon.c</SOURCEFILE><SOURCEFILE>uart\uart.c</SOURCEFILE><SOURCEFILE>C:\Hard\Git\Smodule\spi\spi.c</SOURCEFILE><SOURCEFILE>C:\Hard\Git\Smodule\nrf24l01\nrf24l01.c</SOURCEFILE><HEADERFILE>res\strings.h</HEADERFILE><HEADERFILE>uart\uart.h</HEADERFILE><HEADERFILE>uart\uart_addon.h</HEADERFILE><HEADERFILE>C:\Hard\Git\Smodule\spi\spi.h</HEADERFILE><HEADERFILE>C:\Hard\Git\Smodule\nrf24l01\nrf24l01registers.h</HEADERFILE><HEADERFILE>C:\Hard\Git\Smodule\nrf24l01\nrf24l01.h</HEADERFILE><OTHERFILE>default\Smodule.lss</OTHERFILE><OTHERFILE>default\Smodule.map</OTHERFILE></FILES><CONFIGS><CONFIG><NAME>default</NAME><USESEXTERNALMAKEFILE>NO</USESEXTERNALMAKEFILE><EXTERNALMAKEFILE></EXTERNALMAKEFILE><PART>atmega8</PART><HEX>1</HEX><LIST>1</LIST><MAP>1</MAP><OUTPUTFILENAME>Smodule.elf</OUTPUTFILENAME><OUTPUTDIR>default\</OUTPUTDIR><ISDIRTY>1</ISDIRTY><OPTIONS/><INCDIRS/><LIBDIRS/><LIBS/><LINKOBJECTS/><OPTIONSFORALL>-Wall -gdwarf-2 -std=gnu99 -DF_CPU=8000000UL -Os -funsigned-char -funsigned-bitfields -fpack-struct -fshort-enums</OPTIONSFORALL><LINKEROPTIONS></LINKEROPTIONS><SEGMENTS/></CONFIG></CONFIGS><LASTCONFIG>default</LASTCONFIG><USES_WINAVR>1</USES_WINAVR><GCC_LOC>C:\Program Files\Atmel\AVR Tools\AVR Toolchain\bin\avr-gcc.exe</GCC_LOC><MAKE_LOC>C:\Program Files\Atmel\AVR Tools\AVR Toolchain\bin\make.exe</MAKE_LOC></AVRGCCPLUGIN><IOView><usergroups/><sort sorted="0" column="0" ordername="1" orderaddress="1" ordergroup="1"/></IOView><Files><File00000><FileId>00000</FileId><FileName>main.c</FileName><Status>1</Status></File00000></Files><Events><Bookmarks></Bookmarks></Events><Trace><Filters></Filters></Trace></AVRStudio>

6
Smodule/default/Makefile
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@ -37,7 +37,7 @@ HEX_EEPROM_FLAGS += --change-section-lma .eeprom=0 --no-change-warnings
## Objects that must be built in order to link ## Objects that must be built in order to link
OBJECTS = main.o uart_addon.o uart.o nrf24.o radioPinFunctions.o OBJECTS = main.o uart_addon.o uart.o spi.o nrf24l01.o
## Objects explicitly added by the user ## Objects explicitly added by the user
LINKONLYOBJECTS = LINKONLYOBJECTS =
@ -55,10 +55,10 @@ uart_addon.o: ../uart/uart_addon.c
uart.o: ../uart/uart.c uart.o: ../uart/uart.c
$(CC) $(INCLUDES) $(CFLAGS) -c $< $(CC) $(INCLUDES) $(CFLAGS) -c $<
nrf24.o: ../nrf24l01/nrf24.c spi.o: ../spi/spi.c
$(CC) $(INCLUDES) $(CFLAGS) -c $< $(CC) $(INCLUDES) $(CFLAGS) -c $<
radioPinFunctions.o: ../nrf24l01/radioPinFunctions.c nrf24l01.o: ../nrf24l01/nrf24l01.c
$(CC) $(INCLUDES) $(CFLAGS) -c $< $(CC) $(INCLUDES) $(CFLAGS) -c $<
##Link ##Link

101
Smodule/main.c
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@ -1,16 +1,24 @@
// Ïðîøèâêà äëÿ óäàëåííîãî ðàäèîìîäóëÿ // Ïðîøèâêà äëÿ ñåðâåðíîãî ðàäèîìîäóëÿ
#include <avr/io.h> #include <avr/io.h>
#include <stdio.h> #include <stdio.h>
#include <string.h>
#include <avr/interrupt.h> #include <avr/interrupt.h>
#include <util/delay.h> #include <util/delay.h>
#include "uart/uart.h" #include "uart/uart.h"
#include "uart/uart_addon.h" #include "uart/uart_addon.h"
#include "res/strings.h" #include "res/strings.h"
#include "nrf24l01/nrf24.h" #include "nrf24l01/nrf24l01.h"
#define UART_BAUD_RATE 9600 #define UART_BAUD_RATE 9600
typedef struct t_data{
uint8_t from;
uint8_t to;
char cmd[5];
uint8_t value[25];
}t_data;
unsigned char get_uart_char(void){ unsigned char get_uart_char(void){
unsigned int res; unsigned int res;
do{ do{
@ -19,8 +27,8 @@ unsigned char get_uart_char(void){
return (unsigned char) res; return (unsigned char) res;
} }
static int get_uart_line(char *pbuf, int len_ln){ static uint8_t get_uart_line(char *pbuf, uint8_t len_ln){
int i = 0; uint8_t i = 0;
unsigned char c; unsigned char c;
len_ln=len_ln-1; len_ln=len_ln-1;
@ -33,77 +41,44 @@ static int get_uart_line(char *pbuf, int len_ln){
return i; return i;
} }
typedef struct data_arr{ uint8_t mac[NRF24L01_ADDRSIZE] = {0xF0, 0xF0, 0xF0, 0xF0, 0xF0};
uint8_t buffer[32];
}data_array;
uint8_t rx_mac[5] = {0xE7,0xE7,0xE7,0xE7,0xE7};
uint8_t tx_mac[5] = {0xD7,0xD7,0xD7,0xD7,0xD7};
uint8_t temp;
int main(void){ int main(void){
t_data data;
uint8_t i;
uart_init(UART_BAUD_SELECT(UART_BAUD_RATE,F_CPU)); uart_init(UART_BAUD_SELECT(UART_BAUD_RATE,F_CPU));
nrf24l01_init();
/* initializes hardware pins */
nrf24_init();
/* RF channel: #2 , payload length: 4 */
nrf24_config(2,32);
/* Set the module's own address */
nrf24_rx_address(rx_mac);
/* Set the transmit address */
nrf24_tx_address(tx_mac);
sei(); sei();
data_array buff; nrf24l01_settxaddr(mac);
char cmd[5]; for (i=1; i<6; i++){
uint8_t i; mac[4] = 0xF0 & ( 0x0F & i);
unsigned int len_line=0; nrf24l01_setrxaddr(i, mac);
}
uart_puts_p(CmdPrompt); uart_puts_p(CmdPrompt);
while(1){ while(1){
if (!(UCSRA & (1 << RXC))){ if (!(UCSRA & (1 << RXC))){
len_line=get_uart_line(&cmd[0],sizeof(cmd)); i=get_uart_line(&data.cmd[0],sizeof(data.cmd));
if (len_line>0){ if (i>0){
if (strcmp(cmd, CmdLD)==0){ data.from = 0;
/* Automatically goes to TX mode */ data.to = 0xFF;
nrf24_send((uint8_t*) &cmd); if (strcmp(data.cmd, CmdLD)==0){
/* Wait for transmission to end */ i = nrf24l01_write((uint8_t*) &data);
while(nrf24_isSending());
/* Make analysis on last tranmission attempt */ if(i == 1){
temp = nrf24_lastMessageStatus();
if(temp == NRF24_TRANSMISSON_OK){
uart_puts_p(TransOK); uart_puts_p(TransOK);
}else if(temp == NRF24_MESSAGE_LOST){ }else{
uart_puts_p(TransLost); uart_puts_p(TransLost);
} }
/* Retranmission count indicates the tranmission quality */
temp = nrf24_retransmissionCount();
uart_puts_p(ReTransCnt);
uart_put_int(temp);
uart_puts_p(CmdPrompt); uart_puts_p(CmdPrompt);
/* Optionally, go back to RX mode ... */
nrf24_powerUpRx();
/* Or you might want to power down after TX */
// nrf24_powerDown();
/* Wait a little ... */
_delay_ms(10);
} }
if (strcmp(cmd, CmdHelp)==0){ if (strcmp(data.cmd, CmdHelp)==0){
uart_puts_p(HelpTitle); uart_puts_p(HelpTitle);
uart_puts_p(HelpItem1); uart_puts_p(HelpItem1);
uart_puts_p(HelpItem2); uart_puts_p(HelpItem2);
@ -111,10 +86,16 @@ int main(void){
} }
} }
} }
if(nrf24_dataReady()){ if(nrf24l01_readready(0)){
nrf24_getData((uint8_t *) &buff); nrf24l01_read((uint8_t*) &data);
for ( i=0; i < sizeof(buff.buffer); i++ ){ uart_puts(data.cmd);
uart_puthex_byte(buff.buffer[i]); uart_putc('-');
uart_puthex_byte(data.from);
uart_putc('>');
uart_puthex_byte(data.to);
uart_putc(':');
for ( i=0; i < sizeof(data.value); i++ ){
uart_puthex_byte(data.value[i]);
uart_putc(' '); uart_putc(' ');
} }
uart_puts(CRLF); uart_puts(CRLF);

195
Smodule/nrf24l01/nRF24L01.h
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@ -1,130 +1,101 @@
/* /*
Copyright (c) 2007 Stefan Engelke <mbox@stefanengelke.de> nrf24l01 lib 0x02
Permission is hereby granted, free of charge, to any person copyright (c) Davide Gironi, 2012
obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without
restriction, including without limitation the rights to use, copy,
modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be References:
included in all copies or substantial portions of the Software. - This library is based upon nRF24L01 avr lib by Stefan Engelke
http://www.tinkerer.eu/AVRLib/nRF24L01
- and arduino library 2011 by J. Coliz
http://maniacbug.github.com/RF24
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, Released under GPLv3.
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF Please refer to LICENSE file for licensing information.
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
$Id$
*/ */
/* Memory Map */ #ifndef _NRF24L01_H_
#define CONFIG 0x00 #define _NRF24L01_H_
#define EN_AA 0x01
#define EN_RXADDR 0x02
#define SETUP_AW 0x03
#define SETUP_RETR 0x04
#define RF_CH 0x05
#define RF_SETUP 0x06
#define STATUS 0x07
#define OBSERVE_TX 0x08
#define CD 0x09
#define RX_ADDR_P0 0x0A
#define RX_ADDR_P1 0x0B
#define RX_ADDR_P2 0x0C
#define RX_ADDR_P3 0x0D
#define RX_ADDR_P4 0x0E
#define RX_ADDR_P5 0x0F
#define TX_ADDR 0x10
#define RX_PW_P0 0x11
#define RX_PW_P1 0x12
#define RX_PW_P2 0x13
#define RX_PW_P3 0x14
#define RX_PW_P4 0x15
#define RX_PW_P5 0x16
#define FIFO_STATUS 0x17
#define DYNPD 0x1C
/* Bit Mnemonics */ #include <avr/io.h>
/* configuratio nregister */ //CE and CSN port definitions
#define MASK_RX_DR 6 #define NRF24L01_DDR DDRB
#define MASK_TX_DS 5 #define NRF24L01_PORT PORTB
#define MASK_MAX_RT 4 #define NRF24L01_CE PB0
#define EN_CRC 3 #define NRF24L01_CSN PB1
#define CRCO 2
#define PWR_UP 1
#define PRIM_RX 0
/* enable auto acknowledgment */ //define the spi path
#define ENAA_P5 5 #define NRF24L01_SPIPATH "../spi/spi.h" //spi lib path
#define ENAA_P4 4
#define ENAA_P3 3
#define ENAA_P2 2
#define ENAA_P1 1
#define ENAA_P0 0
/* enable rx addresses */ //CE and CSN functions
#define ERX_P5 5 #define nrf24l01_CSNhi NRF24L01_PORT |= (1<<NRF24L01_CSN);
#define ERX_P4 4 #define nrf24l01_CSNlo NRF24L01_PORT &= ~(1<<NRF24L01_CSN);
#define ERX_P3 3 #define nrf24l01_CEhi NRF24L01_PORT |= (1<<NRF24L01_CE);
#define ERX_P2 2 #define nrf24l01_CElo NRF24L01_PORT &= ~(1<<NRF24L01_CE);
#define ERX_P1 1
#define ERX_P0 0
/* setup of address width */ //power setup
#define AW 0 /* 2 bits */ #define NRF24L01_RF24_PA_MIN 1
#define NRF24L01_RF24_PA_LOW 2
#define NRF24L01_RF24_PA_HIGH 3
#define NRF24L01_RF24_PA_MAX 4
#define NRF24L01_RF24_PA NRF24L01_RF24_PA_MAX
/* setup of auto re-transmission */ //speed setup
#define ARD 4 /* 4 bits */ #define NRF24L01_RF24_SPEED_250KBPS 1
#define ARC 0 /* 4 bits */ #define NRF24L01_RF24_SPEED_1MBPS 2
#define NRF24L01_RF24_SPEED_2MBPS 3
#define NRF24L01_RF24_SPEED NRF24L01_RF24_SPEED_1MBPS
/* RF setup register */ //crc setup
#define PLL_LOCK 4 #define NRF24L01_RF24_CRC_DISABLED 1
#define RF_DR 3 #define NRF24L01_RF24_CRC_8 2
#define RF_PWR 1 /* 2 bits */ #define NRF24L01_RF24_CRC_16 3
#define NRF24L01_RF24_CRC NRF24L01_RF24_CRC_16
/* general status register */ //transmission channel
#define RX_DR 6 #define NRF24L01_CH 2
#define TX_DS 5
#define MAX_RT 4
#define RX_P_NO 1 /* 3 bits */
#define TX_FULL 0
/* transmit observe register */ //payload lenght
#define PLOS_CNT 4 /* 4 bits */ #define NRF24L01_PAYLOAD 32
#define ARC_CNT 0 /* 4 bits */
/* fifo status */ //auto ack enabled
#define TX_REUSE 6 #define NRF24L01_ACK 1
#define FIFO_FULL 5
#define TX_EMPTY 4
#define RX_FULL 1
#define RX_EMPTY 0
/* dynamic length */ //auto retransmit delay and count
#define DPL_P0 0 #define NRF24L01_RETR (0b0100 << NRF24L01_REG_ARD) | (0b0111 << NRF24L01_REG_ARC) //1500uS, 15 times
#define DPL_P1 1
#define DPL_P2 2
#define DPL_P3 3
#define DPL_P4 4
#define DPL_P5 5
/* Instruction Mnemonics */ //enable / disable pipe
#define R_REGISTER 0x00 /* last 4 bits will indicate reg. address */ #define NRF24L01_ENABLEDP0 1 //pipe 0
#define W_REGISTER 0x20 /* last 4 bits will indicate reg. address */ #define NRF24L01_ENABLEDP1 1 //pipe 1
#define REGISTER_MASK 0x1F #define NRF24L01_ENABLEDP2 1 //pipe 2
#define R_RX_PAYLOAD 0x61 #define NRF24L01_ENABLEDP3 1 //pipe 3
#define W_TX_PAYLOAD 0xA0 #define NRF24L01_ENABLEDP4 1 //pipe 4
#define FLUSH_TX 0xE1 #define NRF24L01_ENABLEDP5 1 //pipe 5
#define FLUSH_RX 0xE2
#define REUSE_TX_PL 0xE3 //address size
#define ACTIVATE 0x50 #define NRF24L01_ADDRSIZE 5
#define R_RX_PL_WID 0x60
#define NOP 0xFF //pipe address
#define NRF24L01_ADDRP0 {0xE8, 0xE8, 0xF0, 0xF0, 0xE2} //pipe 0, 5 byte address
#define NRF24L01_ADDRP1 {0xC1, 0xC2, 0xC2, 0xC2, 0xC2} //pipe 1, 5 byte address
#define NRF24L01_ADDRP2 {0xC1, 0xC2, 0xC2, 0xC2, 0xC3} //pipe 2, 5 byte address
#define NRF24L01_ADDRP3 {0xC1, 0xC2, 0xC2, 0xC2, 0xC4} //pipe 3, 5 byte address
#define NRF24L01_ADDRP4 {0xC1, 0xC2, 0xC2, 0xC2, 0xC5} //pipe 4, 5 byte address
#define NRF24L01_ADDRP5 {0xC1, 0xC2, 0xC2, 0xC2, 0xC6} //pipe 5, 5 byte address
#define NRF24L01_ADDRTX {0xE8, 0xE8, 0xF0, 0xF0, 0xE2} //tx default address*/
//enable print info function
#define NRF24L01_PRINTENABLE 0
extern void nrf24l01_init();
extern uint8_t nrf24l01_getstatus();
extern uint8_t nrf24l01_readready();
extern void nrf24l01_read(uint8_t *data);
extern uint8_t nrf24l01_write(uint8_t *data);
extern void nrf24l01_setrxaddr(uint8_t channel, uint8_t *addr);
extern void nrf24l01_settxaddr(uint8_t *addr);
#if NRF24L01_PRINTENABLE == 1
extern void nrf24l01_printinfo(void(*prints)(const char *), void(*printc)(unsigned char data));
#endif
#endif

351
Smodule/nrf24l01/nrf24.c
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@ -1,351 +0,0 @@
/*
* ----------------------------------------------------------------------------
* “THE COFFEEWARE LICENSE” (Revision 1):
* <ihsan@kehribar.me> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a coffee in return.
* -----------------------------------------------------------------------------
* This library is based on this library:
* https://github.com/aaronds/arduino-nrf24l01
* Which is based on this library:
* http://www.tinkerer.eu/AVRLib/nRF24L01
* -----------------------------------------------------------------------------
*/
#include "nrf24.h"
uint8_t payload_len;
/* init the hardware pins */
void nrf24_init()
{
nrf24_setupPins();
nrf24_ce_digitalWrite(LOW);
nrf24_csn_digitalWrite(HIGH);
}
/* configure the module */
void nrf24_config(uint8_t channel, uint8_t pay_length)
{
/* Use static payload length ... */
payload_len = pay_length;
// Set RF channel
nrf24_configRegister(RF_CH,channel);
// Set length of incoming payload
nrf24_configRegister(RX_PW_P0, 0x00); // Auto-ACK pipe ...
nrf24_configRegister(RX_PW_P1, payload_len); // Data payload pipe
nrf24_configRegister(RX_PW_P2, 0x00); // Pipe not used
nrf24_configRegister(RX_PW_P3, 0x00); // Pipe not used
nrf24_configRegister(RX_PW_P4, 0x00); // Pipe not used
nrf24_configRegister(RX_PW_P5, 0x00); // Pipe not used
// 1 Mbps, TX gain: 0dbm
nrf24_configRegister(RF_SETUP, (0<<RF_DR)|((0x03)<<RF_PWR));
// CRC enable, 1 byte CRC length
nrf24_configRegister(CONFIG,nrf24_CONFIG);
// Auto Acknowledgment
nrf24_configRegister(EN_AA,(1<<ENAA_P0)|(1<<ENAA_P1)|(0<<ENAA_P2)|(0<<ENAA_P3)|(0<<ENAA_P4)|(0<<ENAA_P5));
// Enable RX addresses
nrf24_configRegister(EN_RXADDR,(1<<ERX_P0)|(1<<ERX_P1)|(0<<ERX_P2)|(0<<ERX_P3)|(0<<ERX_P4)|(0<<ERX_P5));
// Auto retransmit delay: 1000 us and Up to 15 retransmit trials
nrf24_configRegister(SETUP_RETR,(0x04<<ARD)|(0x0F<<ARC));
// Dynamic length configurations: No dynamic length
nrf24_configRegister(DYNPD,(0<<DPL_P0)|(0<<DPL_P1)|(0<<DPL_P2)|(0<<DPL_P3)|(0<<DPL_P4)|(0<<DPL_P5));
// Start listening
nrf24_powerUpRx();
}
/* Set the RX address */
void nrf24_rx_address(uint8_t * adr)
{
nrf24_ce_digitalWrite(LOW);
nrf24_writeRegister(RX_ADDR_P1,adr,nrf24_ADDR_LEN);
nrf24_ce_digitalWrite(HIGH);
}
/* Returns the payload length */
uint8_t nrf24_payload_length()
{
return payload_len;
}
/* Set the TX address */
void nrf24_tx_address(uint8_t* adr)
{
/* RX_ADDR_P0 must be set to the sending addr for auto ack to work. */
nrf24_writeRegister(RX_ADDR_P0,adr,nrf24_ADDR_LEN);
nrf24_writeRegister(TX_ADDR,adr,nrf24_ADDR_LEN);
}
/* Checks if data is available for reading */
/* Returns 1 if data is ready ... */
uint8_t nrf24_dataReady()
{
// See note in getData() function - just checking RX_DR isn't good enough
uint8_t status = nrf24_getStatus();
// We can short circuit on RX_DR, but if it's not set, we still need
// to check the FIFO for any pending packets
if ( status & (1 << RX_DR) )
{
return 1;
}
return !nrf24_rxFifoEmpty();;
}
/* Checks if receive FIFO is empty or not */
uint8_t nrf24_rxFifoEmpty()
{
uint8_t fifoStatus;
nrf24_readRegister(FIFO_STATUS,&fifoStatus,1);
return (fifoStatus & (1 << RX_EMPTY));
}
/* Returns the length of data waiting in the RX fifo */
uint8_t nrf24_payloadLength()
{
uint8_t status;
nrf24_csn_digitalWrite(LOW);
spi_transfer(R_RX_PL_WID);
status = spi_transfer(0x00);
nrf24_csn_digitalWrite(HIGH);
return status;
}
/* Reads payload bytes into data array */
void nrf24_getData(uint8_t* data)
{
/* Pull down chip select */
nrf24_csn_digitalWrite(LOW);
/* Send cmd to read rx payload */
spi_transfer( R_RX_PAYLOAD );
/* Read payload */
nrf24_transferSync(data,data,payload_len);
/* Pull up chip select */
nrf24_csn_digitalWrite(HIGH);
/* Reset status register */
nrf24_configRegister(STATUS,(1<<RX_DR));
}
/* Returns the number of retransmissions occured for the last message */
uint8_t nrf24_retransmissionCount()
{
uint8_t rv;
nrf24_readRegister(OBSERVE_TX,&rv,1);
rv = rv & 0x0F;
return rv;
}
// Sends a data package to the default address. Be sure to send the correct
// amount of bytes as configured as payload on the receiver.
void nrf24_send(uint8_t* value)
{
/* Go to Standby-I first */
nrf24_ce_digitalWrite(LOW);
/* Set to transmitter mode , Power up if needed */
nrf24_powerUpTx();
/* Do we really need to flush TX fifo each time ? */
#if 1
/* Pull down chip select */
nrf24_csn_digitalWrite(LOW);
/* Write cmd to flush transmit FIFO */
spi_transfer(FLUSH_TX);
/* Pull up chip select */
nrf24_csn_digitalWrite(HIGH);
#endif
/* Pull down chip select */
nrf24_csn_digitalWrite(LOW);
/* Write cmd to write payload */
spi_transfer(W_TX_PAYLOAD);
/* Write payload */
nrf24_transmitSync(value,payload_len);
/* Pull up chip select */
nrf24_csn_digitalWrite(HIGH);
/* Start the transmission */
nrf24_ce_digitalWrite(HIGH);
}
uint8_t nrf24_isSending()
{
uint8_t status;
/* read the current status */
status = nrf24_getStatus();
/* if sending successful (TX_DS) or max retries exceded (MAX_RT). */
if((status & ((1 << TX_DS) | (1 << MAX_RT))))
{
return 0; /* false */
}
return 1; /* true */
}
uint8_t nrf24_getStatus()
{
uint8_t rv;
nrf24_csn_digitalWrite(LOW);
rv = spi_transfer(NOP);
nrf24_csn_digitalWrite(HIGH);
return rv;
}
uint8_t nrf24_lastMessageStatus()
{
uint8_t rv;
rv = nrf24_getStatus();
/* Transmission went OK */
if((rv & ((1 << TX_DS))))
{
return NRF24_TRANSMISSON_OK;
}
/* Maximum retransmission count is reached */
/* Last message probably went missing ... */
else if((rv & ((1 << MAX_RT))))
{
return NRF24_MESSAGE_LOST;
}
/* Probably still sending ... */
else
{
return 0xFF;
}
}
void nrf24_powerUpRx()
{
nrf24_csn_digitalWrite(LOW);
spi_transfer(FLUSH_RX);
nrf24_csn_digitalWrite(HIGH);
nrf24_configRegister(STATUS,(1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT));
nrf24_ce_digitalWrite(LOW);
nrf24_configRegister(CONFIG,nrf24_CONFIG|((1<<PWR_UP)|(1<<PRIM_RX)));
nrf24_ce_digitalWrite(HIGH);
}
void nrf24_powerUpTx()
{
nrf24_configRegister(STATUS,(1<<RX_DR)|(1<<TX_DS)|(1<<MAX_RT));
nrf24_configRegister(CONFIG,nrf24_CONFIG|((1<<PWR_UP)|(0<<PRIM_RX)));
}
void nrf24_powerDown()
{
nrf24_ce_digitalWrite(LOW);
nrf24_configRegister(CONFIG,nrf24_CONFIG);
}
/* software spi routine */
uint8_t spi_transfer(uint8_t tx)
{
uint8_t i = 0;
uint8_t rx = 0;
nrf24_sck_digitalWrite(LOW);
for(i=0;i<8;i++)
{
if(tx & (1<<(7-i)))
{
nrf24_mosi_digitalWrite(HIGH);
}
else
{
nrf24_mosi_digitalWrite(LOW);
}
nrf24_sck_digitalWrite(HIGH);
rx = rx << 1;
if(nrf24_miso_digitalRead())
{
rx |= 0x01;
}
nrf24_sck_digitalWrite(LOW);
}
return rx;
}
/* send and receive multiple bytes over SPI */
void nrf24_transferSync(uint8_t* dataout,uint8_t* datain,uint8_t len)
{
uint8_t i;
for(i=0;i<len;i++)
{
datain[i] = spi_transfer(dataout[i]);
}
}
/* send multiple bytes over SPI */
void nrf24_transmitSync(uint8_t* dataout,uint8_t len)
{
uint8_t i;
for(i=0;i<len;i++)
{
spi_transfer(dataout[i]);
}
}
/* Clocks only one byte into the given nrf24 register */
void nrf24_configRegister(uint8_t reg, uint8_t value)
{
nrf24_csn_digitalWrite(LOW);
spi_transfer(W_REGISTER | (REGISTER_MASK & reg));
spi_transfer(value);
nrf24_csn_digitalWrite(HIGH);
}
/* Read single register from nrf24 */
void nrf24_readRegister(uint8_t reg, uint8_t* value, uint8_t len)
{
nrf24_csn_digitalWrite(LOW);
spi_transfer(R_REGISTER | (REGISTER_MASK & reg));
nrf24_transferSync(value,value,len);
nrf24_csn_digitalWrite(HIGH);
}
/* Write to a single register of nrf24 */
void nrf24_writeRegister(uint8_t reg, uint8_t* value, uint8_t len)
{
nrf24_csn_digitalWrite(LOW);
spi_transfer(W_REGISTER | (REGISTER_MASK & reg));
nrf24_transmitSync(value,len);
nrf24_csn_digitalWrite(HIGH);
}

116
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@ -1,116 +0,0 @@
/*
* ----------------------------------------------------------------------------
* “THE COFFEEWARE LICENSE” (Revision 1):
* <ihsan@kehribar.me> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a coffee in return.
* -----------------------------------------------------------------------------
* This library is based on this library:
* https://github.com/aaronds/arduino-nrf24l01
* Which is based on this library:
* http://www.tinkerer.eu/AVRLib/nRF24L01
* -----------------------------------------------------------------------------
*/
#ifndef NRF24
#define NRF24
#include "nRF24L01.h"
#include <stdint.h>
#define LOW 0
#define HIGH 1
#define nrf24_ADDR_LEN 5
#define nrf24_CONFIG ((1<<EN_CRC)|(0<<CRCO))
#define NRF24_TRANSMISSON_OK 0
#define NRF24_MESSAGE_LOST 1
/* adjustment functions */
void nrf24_init();
void nrf24_rx_address(uint8_t* adr);
void nrf24_tx_address(uint8_t* adr);
void nrf24_config(uint8_t channel, uint8_t pay_length);
/* state check functions */
uint8_t nrf24_dataReady();
uint8_t nrf24_isSending();
uint8_t nrf24_getStatus();
uint8_t nrf24_rxFifoEmpty();
/* core TX / RX functions */
void nrf24_send(uint8_t* value);
void nrf24_getData(uint8_t* data);
/* use in dynamic length mode */
uint8_t nrf24_payloadLength();
/* post transmission analysis */
uint8_t nrf24_lastMessageStatus();
uint8_t nrf24_retransmissionCount();
/* Returns the payload length */
uint8_t nrf24_payload_length();
/* power management */
void nrf24_powerUpRx();
void nrf24_powerUpTx();
void nrf24_powerDown();
/* low level interface ... */
uint8_t spi_transfer(uint8_t tx);
void nrf24_transmitSync(uint8_t* dataout,uint8_t len);
void nrf24_transferSync(uint8_t* dataout,uint8_t* datain,uint8_t len);
void nrf24_configRegister(uint8_t reg, uint8_t value);
void nrf24_readRegister(uint8_t reg, uint8_t* value, uint8_t len);
void nrf24_writeRegister(uint8_t reg, uint8_t* value, uint8_t len);
/* -------------------------------------------------------------------------- */
/* You should implement the platform spesific functions in your code */
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
/* In this function you should do the following things:
* - Set MISO pin input
* - Set MOSI pin output
* - Set SCK pin output
* - Set CSN pin output
* - Set CE pin output */
/* -------------------------------------------------------------------------- */
extern void nrf24_setupPins();
/* -------------------------------------------------------------------------- */
/* nrf24 CE pin control function
* - state:1 => Pin HIGH
* - state:0 => Pin LOW */
/* -------------------------------------------------------------------------- */
extern void nrf24_ce_digitalWrite(uint8_t state);
/* -------------------------------------------------------------------------- */
/* nrf24 CE pin control function
* - state:1 => Pin HIGH
* - state:0 => Pin LOW */
/* -------------------------------------------------------------------------- */
extern void nrf24_csn_digitalWrite(uint8_t state);
/* -------------------------------------------------------------------------- */
/* nrf24 SCK pin control function
* - state:1 => Pin HIGH
* - state:0 => Pin LOW */
/* -------------------------------------------------------------------------- */
extern void nrf24_sck_digitalWrite(uint8_t state);
/* -------------------------------------------------------------------------- */
/* nrf24 MOSI pin control function
* - state:1 => Pin HIGH
* - state:0 => Pin LOW */
/* -------------------------------------------------------------------------- */
extern void nrf24_mosi_digitalWrite(uint8_t state);
/* -----------------------------------------*/
/* nrf24 MISO pin read function */
/* - returns: Non-zero if the pin is high */
/* -----------------------------------------*/
extern uint8_t nrf24_miso_digitalRead();
#endif

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Smodule/nrf24l01/nrf24l01.c Normal file
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/*
nrf24l01 lib 0x02
copyright (c) Davide Gironi, 2012
Released under GPLv3.
Please refer to LICENSE file for licensing information.
*/
#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include <string.h>
#include <stdio.h>
#include "nrf24l01.h"
#include "nrf24l01registers.h"
//include spi library functions
#include NRF24L01_SPIPATH
//address variables
static uint8_t nrf24l01_addr0[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP0;
static uint8_t nrf24l01_addr1[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP1;
static uint8_t nrf24l01_addr2[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP2;
static uint8_t nrf24l01_addr3[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP3;
static uint8_t nrf24l01_addr4[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP4;
static uint8_t nrf24l01_addr5[NRF24L01_ADDRSIZE] = NRF24L01_ADDRP5;
static uint8_t nrf24l01_addrtx[NRF24L01_ADDRSIZE] = NRF24L01_ADDRTX;
/*
* read one register
*/
uint8_t nrf24l01_readregister(uint8_t reg) {
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_R_REGISTER | (NRF24L01_CMD_REGISTER_MASK & reg));
uint8_t result = spi_writereadbyte(NRF24L01_CMD_NOP); //read write register
nrf24l01_CSNhi; //high CSN
return result;
}
/*
* read many registers
*/
void nrf24l01_readregisters(uint8_t reg, uint8_t *value, uint8_t len) {
uint8_t i = 0;
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_R_REGISTER | (NRF24L01_CMD_REGISTER_MASK & reg));
for(i=0; i<len; i++)
value[i] = spi_writereadbyte(NRF24L01_CMD_NOP); //read write register
nrf24l01_CSNhi; //high CSN
}
/*
* write one register
*/
void nrf24l01_writeregister(uint8_t reg, uint8_t value) {
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_W_REGISTER | (NRF24L01_CMD_REGISTER_MASK & reg));
spi_writereadbyte(value); //write register
nrf24l01_CSNhi; //high CSN
}
/*
* write many registers
*/
void nrf24l01_writeregisters(uint8_t reg, uint8_t *value, uint8_t len) {
uint8_t i = 0;
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_W_REGISTER | (NRF24L01_CMD_REGISTER_MASK & reg));
for(i=0; i<len; i++)
spi_writereadbyte(value[i]); //write register
nrf24l01_CSNhi; //high CSN
}
/*
* reverse an array, NRF24L01 expects LSB first
*/
void nrf24l01_revaddress(uint8_t *addr, uint8_t *addrrev) {
//reverse address
uint8_t i = 0;
for(i=0; i<NRF24L01_ADDRSIZE; i++)
memcpy(&addrrev[i], &addr[NRF24L01_ADDRSIZE-1-i], 1);
}
/*
* set rx address
*/
void nrf24l01_setrxaddr(uint8_t pipe, uint8_t *addr) {
if(pipe == 0) {
memcpy(&nrf24l01_addr0, addr, NRF24L01_ADDRSIZE); //cache address
uint8_t addrrev[NRF24L01_ADDRSIZE];
nrf24l01_revaddress(addr, (uint8_t *)addrrev);
nrf24l01_writeregisters(NRF24L01_REG_RX_ADDR_P0, addrrev, NRF24L01_ADDRSIZE);
} else if(pipe == 1) {
memcpy(&nrf24l01_addr1, addr, NRF24L01_ADDRSIZE); //cache address
uint8_t addrrev[NRF24L01_ADDRSIZE];
nrf24l01_revaddress(addr, (uint8_t *)addrrev);
nrf24l01_writeregisters(NRF24L01_REG_RX_ADDR_P1, addrrev, NRF24L01_ADDRSIZE);
} else if(pipe == 2) {
memcpy(&nrf24l01_addr2, addr, NRF24L01_ADDRSIZE); //cache address
nrf24l01_writeregister(NRF24L01_REG_RX_ADDR_P2, addr[NRF24L01_ADDRSIZE-1]); //write only LSB MSBytes are equal to RX_ADDR_P
} else if(pipe == 3) {
memcpy(&nrf24l01_addr3, addr, NRF24L01_ADDRSIZE); //cache address
nrf24l01_writeregister(NRF24L01_REG_RX_ADDR_P3, addr[NRF24L01_ADDRSIZE-1]); //write only LSB MSBytes are equal to RX_ADDR_P
} else if(pipe == 4) {
memcpy(&nrf24l01_addr4, addr, NRF24L01_ADDRSIZE); //cache address
nrf24l01_writeregister(NRF24L01_REG_RX_ADDR_P4, addr[NRF24L01_ADDRSIZE-1]); //write only LSB MSBytes are equal to RX_ADDR_P
} else if(pipe == 5) {
memcpy(&nrf24l01_addr5, addr, NRF24L01_ADDRSIZE); //cache address
nrf24l01_writeregister(NRF24L01_REG_RX_ADDR_P5, addr[NRF24L01_ADDRSIZE-1]); //write only LSB MSBytes are equal to RX_ADDR_P
}
}
/*
* set tx address
*/
void nrf24l01_settxaddr(uint8_t *addr) {
memcpy(&nrf24l01_addrtx, addr, NRF24L01_ADDRSIZE); //cache address
uint8_t addrrev[NRF24L01_ADDRSIZE];
nrf24l01_revaddress(addr, (uint8_t *)addrrev);
nrf24l01_writeregisters(NRF24L01_REG_RX_ADDR_P0, addrrev, NRF24L01_ADDRSIZE); //set rx address for ack on pipe 0
nrf24l01_writeregisters(NRF24L01_REG_TX_ADDR, addrrev, NRF24L01_ADDRSIZE); //set tx address
}
/*
* flush RX fifo
*/
void nrf24l01_flushRXfifo() {
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_FLUSH_RX);
nrf24l01_CSNhi; //high CSN
}
/*
* flush RX fifo
*/
void nrf24l01_flushTXfifo() {
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_FLUSH_TX);
nrf24l01_CSNhi; //high CSN
}
/*
* set chip as RX
*/
void nrf24l01_setRX() {
nrf24l01_setrxaddr(0, nrf24l01_addr0); //restore pipe 0 address
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) | (1<<NRF24L01_REG_PRIM_RX)); //prx mode
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) | (1<<NRF24L01_REG_PWR_UP)); //power up
nrf24l01_writeregister(NRF24L01_REG_STATUS, (1<<NRF24L01_REG_RX_DR) | (1<<NRF24L01_REG_TX_DS) | (1<<NRF24L01_REG_MAX_RT)); //reset status
nrf24l01_flushRXfifo(); //flush rx fifo
nrf24l01_flushTXfifo(); //flush tx fifo
nrf24l01_CEhi; //start listening
_delay_us(150); //wait for the radio to power up
}
/*
* set chip as TX
*/
void nrf24l01_setTX() {
nrf24l01_CElo; //stop listening
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) & ~(1<<NRF24L01_REG_PRIM_RX)); //ptx mode
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) | (1<<NRF24L01_REG_PWR_UP)); //power up
nrf24l01_writeregister(NRF24L01_REG_STATUS, (1<<NRF24L01_REG_RX_DR) | (1<<NRF24L01_REG_TX_DS) | (1<<NRF24L01_REG_MAX_RT)); //reset status
nrf24l01_flushTXfifo(); //flush tx fifo
_delay_us(150); //wait for the radio to power up
}
#if NRF24L01_PRINTENABLE == 1
/*
* print info
*/
void nrf24l01_printinfo(void(*prints)(const char *), void(*printc)(unsigned char data)) {
char buff[100];
prints("info\r\n");
sprintf(buff,"STATUS: %02X\r\n", nrf24l01_getstatus()); prints(buff);
sprintf(buff,"CONFIG: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_CONFIG)); prints(buff);
sprintf(buff,"RF_CH: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_RF_CH)); prints(buff);
sprintf(buff,"RF_SETUP: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_RF_SETUP)); prints(buff);
sprintf(buff,"EN_AA: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_EN_AA)); prints(buff);
sprintf(buff,"EN_RXADDR: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_EN_RXADDR)); prints(buff);
sprintf(buff,"OBSERVE_TX: %02X\r\n", nrf24l01_readregister(NRF24L01_REG_OBSERVE_TX)); prints(buff);
prints("\r\n");
}
#endif
/*
* get status register
*/
uint8_t nrf24l01_getstatus() {
uint8_t status = 0;
nrf24l01_CSNlo; //low CSN
status = spi_writereadbyte(NRF24L01_CMD_NOP); //get status, send NOP request
nrf24l01_CSNhi; //high CSN
return status;
}
/*
* check if there is data ready
*/
uint8_t nrf24l01_readready(uint8_t* pipe) {
uint8_t status = nrf24l01_getstatus();
uint8_t ret = status & (1<<NRF24L01_REG_RX_DR);
if(ret) {
//get the pipe number
if(pipe)
*pipe = (status >> NRF24L01_REG_RX_P_NO) & 0b111;
}
return ret;
}
/*
* get data
*/
void nrf24l01_read(uint8_t *data) {
uint8_t i = 0;
//read rx register
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_R_RX_PAYLOAD);
for(i=0; i<NRF24L01_PAYLOAD; i++)
data[i] = spi_writereadbyte(NRF24L01_CMD_NOP);
nrf24l01_CSNhi; //high CSN
//reset register
nrf24l01_writeregister(NRF24L01_REG_STATUS, (1<<NRF24L01_REG_RX_DR));
//handle ack payload receipt
if (nrf24l01_getstatus() & (1<<NRF24L01_REG_TX_DS))
nrf24l01_writeregister(NRF24L01_REG_STATUS, (1<<NRF24L01_REG_TX_DS));
}
/*
* put data
*/
uint8_t nrf24l01_write(uint8_t *data) {
uint8_t i = 0;
uint8_t ret = 0;
//set tx mode
nrf24l01_setTX();
//write data
nrf24l01_CSNlo; //low CSN
spi_writereadbyte(NRF24L01_CMD_W_TX_PAYLOAD);
for (i=0; i<NRF24L01_PAYLOAD; i++)
spi_writereadbyte(data[i]);
nrf24l01_CSNhi; //high CSN
//start transmission
nrf24l01_CEhi; //high CE
_delay_us(15);
nrf24l01_CElo; //low CE
//stop if max_retries reached or send is ok
do {
_delay_us(10);
}
while( !(nrf24l01_getstatus() & (1<<NRF24L01_REG_MAX_RT | 1<<NRF24L01_REG_TX_DS)) );
if(nrf24l01_getstatus() & 1<<NRF24L01_REG_TX_DS)
ret = 1;
//reset PLOS_CNT
nrf24l01_writeregister(NRF24L01_REG_RF_CH, NRF24L01_CH);
//power down
nrf24l01_writeregister(NRF24L01_REG_CONFIG, nrf24l01_readregister(NRF24L01_REG_CONFIG) & ~(1<<NRF24L01_REG_PWR_UP));
//set rx mode
nrf24l01_setRX();
return ret;
}
/*
* set power level
*/
void nrf24l01_setpalevel() {
uint8_t setup = nrf24l01_readregister(NRF24L01_REG_RF_SETUP);
setup &= ~((1<<NRF24L01_REG_RF_PWR_LOW) | (1<<NRF24L01_REG_RF_PWR_HIGH));
if (NRF24L01_RF24_PA == NRF24L01_RF24_PA_MAX) {
setup |= (1<<NRF24L01_REG_RF_PWR_LOW) | (1<<NRF24L01_REG_RF_PWR_HIGH);
} else if (NRF24L01_RF24_PA == NRF24L01_RF24_PA_HIGH) {
setup |= (1<<NRF24L01_REG_RF_PWR_HIGH) ;
} else if (NRF24L01_RF24_PA == NRF24L01_RF24_PA_LOW) {
setup |= (1<<NRF24L01_REG_RF_PWR_LOW);
} else if (NRF24L01_RF24_PA == NRF24L01_RF24_PA_MIN) {
} else {
//default is max power
setup |= (1<<NRF24L01_REG_RF_PWR_LOW) | (1<<NRF24L01_REG_RF_PWR_HIGH);
}
nrf24l01_writeregister(NRF24L01_REG_RF_SETUP, setup);
}
/*
* set datarate
*/
void nrf24l01_setdatarate() {
uint8_t setup = nrf24l01_readregister(NRF24L01_REG_RF_SETUP) ;
setup &= ~((1<<NRF24L01_REG_RF_DR_LOW) | (1<<NRF24L01_REG_RF_DR_HIGH));
if(NRF24L01_RF24_SPEED == NRF24L01_RF24_SPEED_250KBPS) {
setup |= (1<<NRF24L01_REG_RF_DR_LOW);
} else {
if (NRF24L01_RF24_SPEED == NRF24L01_RF24_SPEED_2MBPS) {
setup |= (1<<NRF24L01_REG_RF_DR_HIGH);
} else if (NRF24L01_RF24_SPEED == NRF24L01_RF24_SPEED_2MBPS) {
} else {
//default is 1Mbps
}
}
nrf24l01_writeregister(NRF24L01_REG_RF_SETUP, setup);
}
/*
* set crc length
*/
void nrf24l01_setcrclength() {
uint8_t config = nrf24l01_readregister(NRF24L01_REG_CONFIG) & ~((1<<NRF24L01_REG_CRCO) | (1<<NRF24L01_REG_EN_CRC));
if (NRF24L01_RF24_CRC == NRF24L01_RF24_CRC_DISABLED) {
//nothing
} else if (NRF24L01_RF24_CRC == NRF24L01_RF24_CRC_8) {
config |= (1<<NRF24L01_REG_EN_CRC);
} else if (NRF24L01_RF24_CRC == NRF24L01_RF24_CRC_16) {
config |= (1<<NRF24L01_REG_EN_CRC);
config |= (1<<NRF24L01_REG_CRCO);
} else {
//default is disabled
}
nrf24l01_writeregister(NRF24L01_REG_CONFIG, config);
}
/*
* init nrf24l01
*/
void nrf24l01_init() {
//setup port
NRF24L01_DDR |= (1<<NRF24L01_CSN); //output
NRF24L01_DDR |= (1<<NRF24L01_CE); //output
spi_init(); //init spi
nrf24l01_CElo; //low CE
nrf24l01_CSNhi; //high CSN
_delay_ms(5); //wait for the radio to init
nrf24l01_setpalevel(); //set power level
nrf24l01_setdatarate(); //set data rate
nrf24l01_setcrclength(); //set crc length
nrf24l01_writeregister(NRF24L01_REG_SETUP_RETR, NRF24L01_RETR); // set retries
nrf24l01_writeregister(NRF24L01_REG_DYNPD, 0); //disable dynamic payloads
nrf24l01_writeregister(NRF24L01_REG_RF_CH, NRF24L01_CH); //set RF channel
//payload size
#if NRF24L01_ENABLEDP0 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P0, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP1 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P1, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP2 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P2, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP3 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P3, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP4 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P4, NRF24L01_PAYLOAD);
#endif
#if NRF24L01_ENABLEDP5 == 1
nrf24l01_writeregister(NRF24L01_REG_RX_PW_P5, NRF24L01_PAYLOAD);
#endif
//enable pipe
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, 0);
#if NRF24L01_ENABLEDP0 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P0));
#endif
#if NRF24L01_ENABLEDP1 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P1));
#endif
#if NRF24L01_ENABLEDP2 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P2));
#endif
#if NRF24L01_ENABLEDP3 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P3));
#endif
#if NRF24L01_ENABLEDP4 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P4));
#endif
#if NRF24L01_ENABLEDP5 == 1
nrf24l01_writeregister(NRF24L01_REG_EN_RXADDR, nrf24l01_readregister(NRF24L01_REG_EN_RXADDR) | (1<<NRF24L01_REG_ERX_P5));
#endif
//auto ack
#if NRF24L01_ACK == 1
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P0));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P1));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P2));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P3));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P4));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) | (1<<NRF24L01_REG_ENAA_P5));
#else
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P0));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P1));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P2));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P3));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P4));
nrf24l01_writeregister(NRF24L01_REG_EN_AA, nrf24l01_readregister(NRF24L01_REG_EN_AA) & ~(1<<NRF24L01_REG_ENAA_P5));
#endif
//rx address
nrf24l01_setrxaddr(0, nrf24l01_addr0);
nrf24l01_setrxaddr(1, nrf24l01_addr1);
nrf24l01_setrxaddr(2, nrf24l01_addr2);
nrf24l01_setrxaddr(3, nrf24l01_addr3);
nrf24l01_setrxaddr(4, nrf24l01_addr4);
nrf24l01_setrxaddr(5, nrf24l01_addr5);
//tx address
nrf24l01_settxaddr(nrf24l01_addrtx);
//set rx mode
nrf24l01_setRX();
}

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/*
nrf24l01 lib 0x02
copyright (c) Davide Gironi, 2012
Released under GPLv3.
Please refer to LICENSE file for licensing information.
*/
/* Memory Map */
#define NRF24L01_REG_CONFIG 0x00
#define NRF24L01_REG_EN_AA 0x01
#define NRF24L01_REG_EN_RXADDR 0x02
#define NRF24L01_REG_SETUP_AW 0x03
#define NRF24L01_REG_SETUP_RETR 0x04
#define NRF24L01_REG_RF_CH 0x05
#define NRF24L01_REG_RF_SETUP 0x06
#define NRF24L01_REG_STATUS 0x07
#define NRF24L01_REG_OBSERVE_TX 0x08
#define NRF24L01_REG_CD 0x09
#define NRF24L01_REG_RX_ADDR_P0 0x0A
#define NRF24L01_REG_RX_ADDR_P1 0x0B
#define NRF24L01_REG_RX_ADDR_P2 0x0C
#define NRF24L01_REG_RX_ADDR_P3 0x0D
#define NRF24L01_REG_RX_ADDR_P4 0x0E
#define NRF24L01_REG_RX_ADDR_P5 0x0F
#define NRF24L01_REG_TX_ADDR 0x10
#define NRF24L01_REG_RX_PW_P0 0x11
#define NRF24L01_REG_RX_PW_P1 0x12
#define NRF24L01_REG_RX_PW_P2 0x13
#define NRF24L01_REG_RX_PW_P3 0x14
#define NRF24L01_REG_RX_PW_P4 0x15
#define NRF24L01_REG_RX_PW_P5 0x16
#define NRF24L01_REG_FIFO_STATUS 0x17
#define NRF24L01_REG_FEATURE 0x1D
#define NRF24L01_REG_DYNPD 0x1C
/* Bit Mnemonics */
#define NRF24L01_REG_MASK_RX_DR 6
#define NRF24L01_REG_MASK_TX_DS 5
#define NRF24L01_REG_MASK_MAX_RT 4
#define NRF24L01_REG_EN_CRC 3
#define NRF24L01_REG_CRCO 2
#define NRF24L01_REG_PWR_UP 1
#define NRF24L01_REG_PRIM_RX 0
#define NRF24L01_REG_ENAA_P5 5
#define NRF24L01_REG_ENAA_P4 4
#define NRF24L01_REG_ENAA_P3 3
#define NRF24L01_REG_ENAA_P2 2
#define NRF24L01_REG_ENAA_P1 1
#define NRF24L01_REG_ENAA_P0 0
#define NRF24L01_REG_ERX_P5 5
#define NRF24L01_REG_ERX_P4 4
#define NRF24L01_REG_ERX_P3 3
#define NRF24L01_REG_ERX_P2 2
#define NRF24L01_REG_ERX_P1 1
#define NRF24L01_REG_ERX_P0 0
#define NRF24L01_REG_AW 0
#define NRF24L01_REG_ARD 4
#define NRF24L01_REG_ARC 0
#define NRF24L01_REG_PLL_LOCK 4
#define NRF24L01_REG_RF_DR 3
#define NRF24L01_REG_RF_PWR 1
#define NRF24L01_REG_LNA_HCURR 0
#define NRF24L01_REG_RX_DR 6
#define NRF24L01_REG_TX_DS 5
#define NRF24L01_REG_MAX_RT 4
#define NRF24L01_REG_RX_P_NO 1
#define NRF24L01_REG_TX_FULL 0
#define NRF24L01_REG_PLOS_CNT 4
#define NRF24L01_REG_ARC_CNT 0
#define NRF24L01_REG_TX_REUSE 6
#define NRF24L01_REG_FIFO_FULL 5
#define NRF24L01_REG_TX_EMPTY 4
#define NRF24L01_REG_RX_FULL 1
#define NRF24L01_REG_RX_EMPTY 0
#define NRF24L01_REG_RPD 0x09
#define NRF24L01_REG_RF_DR_LOW 5
#define NRF24L01_REG_RF_DR_HIGH 3
#define NRF24L01_REG_RF_PWR_LOW 1
#define NRF24L01_REG_RF_PWR_HIGH 2
/* Instruction Mnemonics */
#define NRF24L01_CMD_R_REGISTER 0x00
#define NRF24L01_CMD_W_REGISTER 0x20
#define NRF24L01_CMD_REGISTER_MASK 0x1F
#define NRF24L01_CMD_R_RX_PAYLOAD 0x61
#define NRF24L01_CMD_W_TX_PAYLOAD 0xA0
#define NRF24L01_CMD_FLUSH_TX 0xE1
#define NRF24L01_CMD_FLUSH_RX 0xE2
#define NRF24L01_CMD_REUSE_TX_PL 0xE3
#define NRF24L01_CMD_NOP 0xFF

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/*
* ----------------------------------------------------------------------------
* “THE COFFEEWARE LICENSE” (Revision 1):
* <ihsan@kehribar.me> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a coffee in return.
* -----------------------------------------------------------------------------
* Please define your platform spesific functions in this file ...
* -----------------------------------------------------------------------------
*/
#include <avr/io.h>
#define set_bit(reg,bit) reg |= (1<<bit)
#define clr_bit(reg,bit) reg &= ~(1<<bit)
#define check_bit(reg,bit) (reg&(1<<bit))
/* ------------------------------------------------------------------------- */
void nrf24_setupPins()
{
set_bit(DDRB,0); // CE output
set_bit(DDRB,1); // CSN output
set_bit(DDRB,5); // SCK output
set_bit(DDRB,3); // MOSI output
clr_bit(DDRB,4); // MISO input
}
/* ------------------------------------------------------------------------- */
void nrf24_ce_digitalWrite(uint8_t state)
{
if(state)
{
set_bit(PORTB,0);
}
else
{
clr_bit(PORTB,0);
}
}
/* ------------------------------------------------------------------------- */
void nrf24_csn_digitalWrite(uint8_t state)
{
if(state)
{
set_bit(PORTB,1);
}
else
{
clr_bit(PORTB,1);
}
}
/* ------------------------------------------------------------------------- */
void nrf24_sck_digitalWrite(uint8_t state)
{
if(state)
{
set_bit(PORTB,5);
}
else
{
clr_bit(PORTB,5);
}
}
/* ------------------------------------------------------------------------- */
void nrf24_mosi_digitalWrite(uint8_t state)
{
if(state)
{
set_bit(PORTB,3);
}
else
{
clr_bit(PORTB,3);
}
}
/* ------------------------------------------------------------------------- */
uint8_t nrf24_miso_digitalRead()
{
return check_bit(PINB,4);
}
/* ------------------------------------------------------------------------- */

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/*
spi lib 0x01
copyright (c) Davide Gironi, 2012
Released under GPLv3.
Please refer to LICENSE file for licensing information.
*/
#include "spi.h"
#include <avr/io.h>
#include <avr/interrupt.h>
/*
* spi initialize
*/
void spi_init() {
SPI_DDR &= ~((1<<SPI_MOSI) | (1<<SPI_MISO) | (1<<SPI_SS) | (1<<SPI_SCK)); //input
SPI_DDR |= ((1<<SPI_MOSI) | (1<<SPI_SS) | (1<<SPI_SCK)); //output
SPCR = ((1<<SPE)| // SPI Enable
(0<<SPIE)| // SPI Interupt Enable
(0<<DORD)| // Data Order (0:MSB first / 1:LSB first)
(1<<MSTR)| // Master/Slave select
(0<<SPR1)|(1<<SPR0)| // SPI Clock Rate
(0<<CPOL)| // Clock Polarity (0:SCK low / 1:SCK hi when idle)
(0<<CPHA)); // Clock Phase (0:leading / 1:trailing edge sampling)
SPSR = (1<<SPI2X); // Double SPI Speed Bit
}
/*
* spi write one byte and read it back
*/
uint8_t spi_writereadbyte(uint8_t data) {
SPDR = data;
while((SPSR & (1<<SPIF)) == 0);
return SPDR;
}

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/*
spi lib 0x01
copyright (c) Davide Gironi, 2012
References:
- This library is based upon SPI avr lib by Stefan Engelke
http://www.tinkerer.eu/AVRLib/SPI
Released under GPLv3.
Please refer to LICENSE file for licensing information.
*/
#ifndef _SPI_H_
#define _SPI_H_
#include <avr/io.h>
//spi ports
#define SPI_DDR DDRB
#define SPI_PORT PORTB
#define SPI_MISO PB4
#define SPI_MOSI PB3
#define SPI_SCK PB5
#define SPI_SS PB2
extern void spi_init();
extern uint8_t spi_writereadbyte(uint8_t data);
#endif

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